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Add support for Trace Ingress Port (TIP) on CVA6 V5.1.0
Verible #1750: Pull request #2601 synchronize by dassheladiya
December 5, 2024 15:48 49s
December 5, 2024 15:48 49s
Add support for Trace Ingress Port (TIP) on CVA6 V5.1.0
Verible #1749: Pull request #2601 synchronize by dassheladiya
December 5, 2024 15:42 58s
December 5, 2024 15:42 58s
Altera flow support
Verible #1748: Pull request #2649 synchronize by AngelaGonzalezMarino
December 5, 2024 15:04 47s
December 5, 2024 15:04 47s
check spike version in cva6.py
Verible #1747: Pull request #2654 opened by valentinThomazic
December 5, 2024 14:21 49s
December 5, 2024 14:21 49s
Altera flow support
Verible #1746: Pull request #2649 synchronize by AngelaGonzalezMarino
December 5, 2024 14:03 55s
December 5, 2024 14:03 55s
[RVV] CVA6 re-parametrization and MMU interface
Verible #1744: Pull request #2652 synchronize by mp-17
December 5, 2024 10:32 54s
December 5, 2024 10:32 54s
Altera flow support
Verible #1743: Pull request #2649 synchronize by AngelaGonzalezMarino
December 5, 2024 08:59 10m 3s
December 5, 2024 08:59 10m 3s
[RVV] CVA6 re-parametrization and MMU interface
Verible #1742: Pull request #2652 opened by mp-17
December 4, 2024 21:46 59s
December 4, 2024 21:46 59s
[CV32A65X] Update PMPADDRn spec to make bit 0 ROCST 0. Update config files.
Verible #1741: Pull request #2651 opened by zchamski
December 4, 2024 16:30 1m 3s
December 4, 2024 16:30 1m 3s
PMP Verif Plan and tests
Verible #1740: Pull request #2648 synchronize by OlivierBetschi
December 4, 2024 15:44 1m 15s
December 4, 2024 15:44 1m 15s
Altera flow support
Verible #1739: Pull request #2649 synchronize by AngelaGonzalezMarino
December 4, 2024 15:32 51s
December 4, 2024 15:32 51s
Altera apu agilex7
Verible #1738: Pull request #2647 synchronize by AngelaGonzalezMarino
December 4, 2024 13:56 50s
December 4, 2024 13:56 50s
Altera flow support
Verible #1737: Pull request #2649 opened by AngelaGonzalezMarino
December 4, 2024 12:52 1m 0s
December 4, 2024 12:52 1m 0s
Altera apu agilex7
Verible #1736: Pull request #2647 synchronize by AngelaGonzalezMarino
December 4, 2024 12:45 57s
December 4, 2024 12:45 57s
Altera apu agilex7
Verible #1735: Pull request #2647 synchronize by AngelaGonzalezMarino
December 4, 2024 12:43 49s
December 4, 2024 12:43 49s
Altera apu agilex7
Verible #1734: Pull request #2647 synchronize by AngelaGonzalezMarino
December 4, 2024 12:43 1m 17s
December 4, 2024 12:43 1m 17s
PMP Verif Plan and tests
Verible #1733: Pull request #2648 opened by OlivierBetschi
December 4, 2024 11:16 47s
December 4, 2024 11:16 47s
[Pmp] Verif plan TXT
Verible #1732: Pull request #2457 synchronize by OlivierBetschi
December 4, 2024 09:46 47s
December 4, 2024 09:46 47s
add cv64a6_imafdch_sv39 config to cva6.py
Verible #1731: Pull request #2646 synchronize by JeanRochCoulon
December 4, 2024 09:25 44s
December 4, 2024 09:25 44s
Pmp/extracted pmp master
Verible #1730: Pull request #2528 synchronize by OlivierBetschi
December 4, 2024 08:11 54s
December 4, 2024 08:11 54s
Altera apu agilex7
Verible #1729: Pull request #2647 opened by AngelaGonzalezMarino
December 3, 2024 15:54 54s
December 3, 2024 15:54 54s
Pmp/extracted pmp master
Verible #1728: Pull request #2528 synchronize by OlivierBetschi
December 3, 2024 15:18 1m 9s
December 3, 2024 15:18 1m 9s
add cv64a6_imafdch_sv39 config to cva6.py
Verible #1727: Pull request #2646 synchronize by Cra2yPierr0t
December 3, 2024 14:51 48s
December 3, 2024 14:51 48s
add cv64a6_imafdch_sv39 config to cva6.py
Verible #1726: Pull request #2646 opened by Cra2yPierr0t
December 3, 2024 14:45 50s
December 3, 2024 14:45 50s