content: blog: Zephyr memory layout update #356
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@pedrominatel @f-hollow Guys, can you take a look? You are the only available reviewers for the articles. |
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@marekmatej Sorry for the delay. I seem to have fixed the issue with unrelated broken links in CI once and for all, please rebase your branch on I will do the review right now. |
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@marekmatej Thank you for further improving the article!
I only have a few nitpicks.
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| The Zephyr sample code (`samples/drivers/ipm/ipm_esp32`) uses IPM (Inter-Processor Mailbox) to demonstrate a simple two-way communication between the `PRO_CPU` core and `APP_CPU` core. Images for both CPU cores must be loaded using the MCUboot. | ||
| Note that there is no support for running AMP if the Simple Boot mechanism is used. | ||
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| Building and flashing a complete set of images running the IPM sample: |
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How about this:
| Building and flashing a complete set of images running the IPM sample: | |
| Now we can build and flash a complete set of images running the IPM sample: |
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Thanks @f-hollow, I've fixed all remaining findings.
Multiple updates and fixes: - Add memory layouts for AMP scenarios - Fix typos and errors in diagrams - Fix typos and errors in text - Remove unused file Signed-off-by: Marek Matej <[email protected]>
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Update the pictures to illustrate the memory utilization for a default scenario with a single CPU as well as a multi-processor case.