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[NS32000] Disable NS32082 PMMU
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@tgtakaoka
tgtakaoka committed Sep 26, 2024
1 parent 1116d1e commit 83bcbc3
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Showing 5 changed files with 80 additions and 30 deletions.
8 changes: 5 additions & 3 deletions src/asm_ns32000.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -130,10 +130,12 @@ Error AsmNs32000::setFpu(StrScanner &scan) {
}

Error AsmNs32000::setPmmu(StrScanner &scan) {
if (scan.iequals_P(TEXT_MMU_NS32082)) {
setMmuType(MMU_NS32082);
} else if (scan.iequals_P(TEXT_none)) {
if (scan.iequals_P(TEXT_none)) {
setMmuType(MMU_NONE);
#ifndef LIBASM_NS32000_NOMMU
} else if (scan.iequals_P(TEXT_MMU_NS32082)) {
setMmuType(MMU_NS32082);
#endif
} else {
return UNKNOWN_OPERAND;
}
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9 changes: 9 additions & 0 deletions src/config_ns32000.h
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Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,9 @@

#include "config_base.h"

/** Disable NS32082 PMMU instructions */
// #define LIBASM_NS32000_NOMMU

namespace libasm {
namespace ns32000 {

Expand All @@ -32,7 +35,9 @@ enum FpuType : uint8_t {
};
enum MmuType : uint8_t {
MMU_NONE,
#ifndef LIBASM_NS32000_NOMMU
MMU_NS32082,
#endif
};

struct CpuSpec final {
Expand All @@ -45,7 +50,11 @@ struct CpuSpec final {
struct Config
: ConfigImpl<CpuType, ADDRESS_24BIT, ADDRESS_BYTE, OPCODE_8BIT, ENDIAN_LITTLE, 25, 7> {
Config(const InsnTable<CpuType> &table)
#ifdef LIBASM_NS32000_NOMMU
: ConfigImpl(table, NS32032), _cpuSpec(NS32032, FPU_NS32081, MMU_NONE) {}
#else
: ConfigImpl(table, NS32032), _cpuSpec(NS32032, FPU_NS32081, MMU_NS32082) {}
#endif

void setCpuType(CpuType cpuType) override {
_cpuSpec.cpu = cpuType;
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62 changes: 39 additions & 23 deletions src/table_ns32000.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -614,14 +614,6 @@ static constexpr Entry FORMAT_8_3[] PROGMEM = {
E4(0x01, TEXT_INSW, SZ_WORD, M_GREG, M_GENR, P_REG, P_GEN1, M_GENW, EM2_LEN32, P_GEN2, EP2_DISP),
E4(0x03, TEXT_INSD, SZ_QUAD, M_GREG, M_GENR, P_REG, P_GEN1, M_GENW, EM2_LEN32, P_GEN2, EP2_DISP),
};
static constexpr Entry FORMAT_8_3_1[] PROGMEM = {
E2(0x0C, TEXT_MOVSUB, SZ_BYTE, M_GENA, M_GENA, P_GEN1, P_GEN2),
E2(0x0D, TEXT_MOVSUW, SZ_WORD, M_GENA, M_GENA, P_GEN1, P_GEN2),
E2(0x0F, TEXT_MOVSUD, SZ_QUAD, M_GENA, M_GENA, P_GEN1, P_GEN2),
E2(0x1C, TEXT_MOVUSB, SZ_BYTE, M_GENA, M_GENA, P_GEN1, P_GEN2),
E2(0x1D, TEXT_MOVUSW, SZ_WORD, M_GENA, M_GENA, P_GEN1, P_GEN2),
E2(0x1F, TEXT_MOVUSD, SZ_QUAD, M_GENA, M_GENA, P_GEN1, P_GEN2),
};
static constexpr Entry FORMAT_8_4[] PROGMEM = {
E3(0x00, TEXT_CHECKB, SZ_BYTE, M_GREG, M_GENA, P_REG, P_GEN1, M_GENR, P_GEN2),
E3(0x01, TEXT_CHECKW, SZ_WORD, M_GREG, M_GENA, P_REG, P_GEN1, M_GENR, P_GEN2),
Expand All @@ -648,19 +640,30 @@ static constexpr uint8_t INDEX_8_3[] PROGMEM = {
2, // TEXT_INSD
1, // TEXT_INSW
};
static constexpr uint8_t INDEX_8_3_1[] PROGMEM = {
static constexpr uint8_t INDEX_8_4[] PROGMEM = {
0, // TEXT_CHECKB
2, // TEXT_CHECKD
1, // TEXT_CHECKW
};

#ifndef LIBASM_NS32000_NOMMU
static constexpr Entry FORMAT_8_3_1_MMU[] PROGMEM = {
E2(0x0C, TEXT_MOVSUB, SZ_BYTE, M_GENA, M_GENA, P_GEN1, P_GEN2),
E2(0x0D, TEXT_MOVSUW, SZ_WORD, M_GENA, M_GENA, P_GEN1, P_GEN2),
E2(0x0F, TEXT_MOVSUD, SZ_QUAD, M_GENA, M_GENA, P_GEN1, P_GEN2),
E2(0x1C, TEXT_MOVUSB, SZ_BYTE, M_GENA, M_GENA, P_GEN1, P_GEN2),
E2(0x1D, TEXT_MOVUSW, SZ_WORD, M_GENA, M_GENA, P_GEN1, P_GEN2),
E2(0x1F, TEXT_MOVUSD, SZ_QUAD, M_GENA, M_GENA, P_GEN1, P_GEN2),
};
static constexpr uint8_t INDEX_8_3_1_MMU[] PROGMEM = {
0, // TEXT_MOVSUB
2, // TEXT_MOVSUD
1, // TEXT_MOVSUW
3, // TEXT_MOVUSB
5, // TEXT_MOVUSD
4, // TEXT_MOVUSW
};
static constexpr uint8_t INDEX_8_4[] PROGMEM = {
0, // TEXT_CHECKB
2, // TEXT_CHECKD
1, // TEXT_CHECKW
};
#endif

// Format 9: |gen1_|gen| |2_|_op|f|ii| |0011|1110|
static constexpr Entry FORMAT_9[] PROGMEM = {
Expand Down Expand Up @@ -765,23 +768,25 @@ static constexpr uint8_t INDEX_11[] PROGMEM = {
6, // TEXT_SUBL
};

#ifndef LIBASM_NS32000_NOMMU
// Format 14: |gen1_|sho| |t|0|_op_|ii| |0001|1110|
static constexpr Entry FORMAT_14_1[] PROGMEM = {
static constexpr Entry FORMAT_14_1_MMU[] PROGMEM = {
E2(0x03, TEXT_RDVAL, SZ_QUAD, M_GENA, M_ZERO, P_GEN1, P_GEN2),
E2(0x07, TEXT_WRVAL, SZ_QUAD, M_GENA, M_ZERO, P_GEN1, P_GEN2),
};
static constexpr Entry FORMAT_14_2[] PROGMEM = {
static constexpr Entry FORMAT_14_2_MMU[] PROGMEM = {
E2(0x0B, TEXT_LMR, SZ_QUAD, M_MREG, M_GENR, P_SHORT, P_GEN1),
E2(0x0F, TEXT_SMR, SZ_QUAD, M_MREG, M_GENW, P_SHORT, P_GEN1),
};
static constexpr uint8_t INDEX_14_1[] PROGMEM = {
static constexpr uint8_t INDEX_14_1_MMU[] PROGMEM = {
0, // TEXT_RDVAL
1, // TEXT_WRVAL
};
static constexpr uint8_t INDEX_14_2[] PROGMEM = {
static constexpr uint8_t INDEX_14_2_MMU[] PROGMEM = {
0, // TEXT_LMR
1, // TEXT_SMR
};
#endif
// clang-format on

struct EntryPage : entry::PrefixTableBase<Entry> {
Expand Down Expand Up @@ -830,12 +835,14 @@ static constexpr EntryPage NS32081_PAGES[] PROGMEM = {
{0xBE, 0xC0, 1, ARRAY_RANGE(FORMAT_11), ARRAY_RANGE(INDEX_11)},
};

#ifndef LIBASM_NS32000_NOMMU
// Memory management instructions
static constexpr EntryPage NS32082_PAGES[] PROGMEM = {
{0xAE, 0xC0, 1, ARRAY_RANGE(FORMAT_8_3_1), ARRAY_RANGE(INDEX_8_3_1)},
{0x1E, 0x00, 1, ARRAY_RANGE(FORMAT_14_1), ARRAY_RANGE(INDEX_14_1)},
{0x1E, 0x80, 1, ARRAY_RANGE(FORMAT_14_2), ARRAY_RANGE(INDEX_14_2)},
{0xAE, 0xC0, 1, ARRAY_RANGE(FORMAT_8_3_1_MMU), ARRAY_RANGE(INDEX_8_3_1_MMU)},
{0x1E, 0x00, 1, ARRAY_RANGE(FORMAT_14_1_MMU), ARRAY_RANGE(INDEX_14_1_MMU)},
{0x1E, 0x80, 1, ARRAY_RANGE(FORMAT_14_2_MMU), ARRAY_RANGE(INDEX_14_2_MMU)},
};
#endif

template <typename CPUTYPE>
using ProcessorBase = entry::CpuBase<CPUTYPE, EntryPage>;
Expand Down Expand Up @@ -902,6 +909,7 @@ static const Fpu *fpu(FpuType fpuType) {
return Fpu::search(fpuType, ARRAY_RANGE(FPU_TABLE));
}

#ifndef LIBASM_NS32000_NOMMU
static constexpr Mmu MMU_TABLE[] PROGMEM = {
{MMU_NS32082, TEXT_MMU_NS32082, ARRAY_RANGE(NS32082_PAGES)},
{MMU_NONE, TEXT_none, EMPTY_RANGE(NS32082_PAGES)},
Expand All @@ -910,6 +918,7 @@ static constexpr Mmu MMU_TABLE[] PROGMEM = {
static const Mmu *mmu(MmuType mmuType) {
return Mmu::search(mmuType, ARRAY_RANGE(MMU_TABLE));
}
#endif

static bool acceptMode(AddrMode opr, AddrMode table) {
if (opr == table)
Expand Down Expand Up @@ -941,8 +950,10 @@ Error TableNs32000::searchName(const CpuSpec &cpuSpec, AsmInsn &insn) const {
cpu(cpuSpec.cpu)->searchName(insn, acceptModes);
if (insn.getError() == UNKNOWN_INSTRUCTION)
fpu(cpuSpec.fpu)->searchName(insn, acceptModes);
#ifndef LIBASM_NS32000_NOMMU
if (insn.getError() == UNKNOWN_INSTRUCTION)
mmu(cpuSpec.mmu)->searchName(insn, acceptModes);
#endif
return insn.getError();
}

Expand All @@ -960,14 +971,19 @@ Error TableNs32000::searchOpCode(const CpuSpec &cpuSpec, DisInsn &insn, StrBuffe
cpu(cpuSpec.cpu)->searchOpCode(insn, out, matchOpCode, readEntryName);
if (insn.getError() == UNKNOWN_INSTRUCTION)
fpu(cpuSpec.fpu)->searchOpCode(insn, out, matchOpCode, readEntryName);
#ifndef LIBASM_NS32000_NOMMU
if (insn.getError() == UNKNOWN_INSTRUCTION)
mmu(cpuSpec.mmu)->searchOpCode(insn, out, matchOpCode, readEntryName);
#endif
return insn.getError();
}

bool TableNs32000::isPrefixCode(const CpuSpec &cpuSpec, uint8_t code) const {
return cpu(cpuSpec.cpu)->isPrefix(code) || fpu(cpuSpec.fpu)->isPrefix(code) ||
mmu(cpuSpec.mmu)->isPrefix(code);
return fpu(cpuSpec.fpu)->isPrefix(code) ||
#ifndef LIBASM_NS32000_NOMMU
mmu(cpuSpec.mmu)->isPrefix(code) ||
#endif
cpu(cpuSpec.cpu)->isPrefix(code);
}

const /*PROGMEM*/ char *TableNs32000::listCpu_P() const {
Expand Down
18 changes: 16 additions & 2 deletions test/test_asm_ns32000.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -48,7 +48,11 @@ static void tear_down() {
TEST("fpu none");
ERRT("fpu ns32082", UNKNOWN_OPERAND, "ns32082");

#ifdef LIBASM_NS32000_NOMMU
ERRT("pmmu ns32082", UNKNOWN_OPERAND, "ns32082");
#else
TEST("pmmu ns32082");
#endif
TEST("pmmu none");
ERRT("pmmu ns32081", UNKNOWN_OPERAND, "ns32081");
}
Expand Down Expand Up @@ -507,6 +511,8 @@ static void test_format_11() {

#endif

#ifndef LIBASM_NS32000_NOMMU

static void test_format_8_mmu() {
TEST("PMMU NS32082");

Expand All @@ -519,7 +525,7 @@ static void test_format_8_mmu() {
ERUI("MOVUSB 9(SB),5(SP)");
}

static void test_format_14() {
static void test_format_14_mmu() {
TEST("PMMU NS32082");

TEST("LMR PTB1,R0", 0x1E, 0x8B, 0x06);
Expand All @@ -535,6 +541,8 @@ static void test_format_14() {
ERUI("WRVAL 0x200(R0)");
}

#endif

static void test_generic_addressing() {
#ifndef LIBASM_ASM_NOFLOAT
TEST("FPU NS32081");
Expand Down Expand Up @@ -677,7 +685,9 @@ static void test_comment() {
#ifndef LIBASM_ASM_NOFLOAT
TEST("FPU NS32081");
#endif
#ifndef LIBASM_NS32000_NOMMU
TEST("PMMU NS32082");
#endif

COMM("ADDB R1 , R0 ; comment", "; comment", 0x00, 0x08);
COMM("ADDB 2 (R2) , R0 ; comment", "; comment", 0x00, 0x50, 0x02);
Expand Down Expand Up @@ -706,7 +716,9 @@ static void test_comment() {
#endif

COMM("LPRB UPSR , R0 ; comment", "; comment", 0x6C, 0x00);
#ifndef LIBASM_NS32000_NOMMU
COMM("LMR PTB0 , R0 ; comment", "; comment", 0x1E, 0x0B, 0x06);
#endif

COMM("SETCFG [ I , F , M , C ] ; comment", "; comment", 0x0E, 0x8B, 0x07);

Expand Down Expand Up @@ -874,8 +886,10 @@ void run_tests(const char *cpu) {
RUN_TEST(test_format_9);
RUN_TEST(test_format_11);
#endif
#ifndef LIBASM_NS32000_NOMMU
RUN_TEST(test_format_8_mmu);
RUN_TEST(test_format_14);
RUN_TEST(test_format_14_mmu);
#endif
RUN_TEST(test_generic_addressing);
RUN_TEST(test_comment);
RUN_TEST(test_undef);
Expand Down
13 changes: 11 additions & 2 deletions test/test_dis_ns32000.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -591,12 +591,14 @@ static void test_format_11() {
0x40, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
}

#ifndef LIBASM_NS32000_NOMMU

static void test_format_8_mmu() {
TEST("MOVSUB", "5(SP), 9(SB)", 0xAE, 0x8C, 0xCE, 0x05, 0x09);
TEST("MOVUSB", "9(SB), 5(SP)", 0xAE, 0x5C, 0xD6, 0x09, 0x05);
}

static void test_format_14() {
static void test_format_14_mmu() {
TEST("LMR", "BPR0, R1", 0x1E, 0x0B, 0x08);
TEST("LMR", "BPR1, R2", 0x1E, 0x8B, 0x10);
ERRT("LMR", ", R3", UNKNOWN_REGISTER, ", R3", 0x1E, 0x0B, 0x19);
Expand Down Expand Up @@ -640,6 +642,7 @@ static void test_format_14() {
UNKN( 0x1E, 0x07, 0x42);
UNKN( 0x1E, 0x07, 0x41);
}
#endif

static void test_generic_addressing() {
// Register
Expand Down Expand Up @@ -782,7 +785,11 @@ static void test_formatter() {
}
// clang-format on

#ifdef LIBASM_NS32000_NOMMU
static const CpuSpec SPEC{NS32032, FPU_NS32081, MMU_NONE};
#else
static const CpuSpec SPEC{NS32032, FPU_NS32081, MMU_NS32082};
#endif

static void assert_unknown(const char *file, int line, Config::opcode_t opc, Config::opcode_t prefix) {
if (TABLE.isPrefixCode(SPEC, prefix)) {
Expand Down Expand Up @@ -965,8 +972,10 @@ void run_tests(const char *cpu) {
RUN_TEST(test_format_8);
RUN_TEST(test_format_9);
RUN_TEST(test_format_11);
#ifndef LIBASM_NS32000_NOMMU
RUN_TEST(test_format_8_mmu);
RUN_TEST(test_format_14);
RUN_TEST(test_format_14_mmu);
#endif
RUN_TEST(test_generic_addressing);
RUN_TEST(test_formatter);
RUN_TEST(test_illegal);
Expand Down

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