When an illegal/invalid instruction is in the second slot of a bunlde…

…, the error show the correct bytes

Previously, the bytes for the first slot were alway shown, regardless of which slot resulted in the erro

include/decoder.h

@@ -111,10 +111,11 @@ namespace patmos
     /// has to point to an array of at least two elements.
     /// @param result A pointer to an array to store the data of the decoded
     /// instructions.
+    /// @param throw_error If true, throws an error instead of returning 0
     /// @return The number of words occupied by the decoded instructions, i.e.,
     /// 1 or 2 if the instructions were decoded successfully, 0 in case of an
     /// error.
-    unsigned int decode(word_t *iwp, instruction_data_t *result);
+    unsigned int decode(word_t *iwp, instruction_data_t *result, bool throw_error=false);
 
     /// Decode a stream of instructions provided by a binary loader.
     /// @return 0 on success, or any error code returned by the callback handler

src/decoder.cc

@@ -41,6 +41,7 @@
 #include "loader.h"
 #include "symbol.h"
 #include "simulation-core.h"
+#include "exception.h"
 
 #include <algorithm>
 
@@ -87,7 +88,7 @@ namespace patmos
             (is_long ? 2 : 1) : 0;
   }
 
-  unsigned int decoder_t::decode(word_t *iwp, instruction_data_t *result)
+  unsigned int decoder_t::decode(word_t *iwp, instruction_data_t *result, bool throw_error)
   {
     word_t iw = from_big_endian<big_word_t>(iwp[0]);
     word_t imm = from_big_endian<big_word_t>(iwp[1]);
@@ -97,7 +98,11 @@ namespace patmos
     if (size == 0)
     {
       // unknown instruction -- report error
-      return 0;
+      if(throw_error) {
+        simulation_exception_t::illegal(from_big_endian<big_word_t>(iwp[0]));
+      } else {
+        return 0;
+      }
     }
     else if (size == 2)
     {
@@ -126,7 +131,11 @@ namespace patmos
     else
     {
       // unknown instruction or invalid encoding? -- report error
-      return 0;
+      if(throw_error) {
+        simulation_exception_t::illegal(from_big_endian<big_word_t>(iwp[1]));
+      } else {
+        return 0;
+      }
     }
 
     // we should never get here

src/simulation-core.cc

@@ -326,13 +326,8 @@ namespace patmos
       else
       {
         // decode the instruction word.
-        unsigned int iw_size = Decoder.decode(iw, instr_SIF);
-
-        // unknown instruction: throw exception
-        if (iw_size == 0)
-        {
-          simulation_exception_t::illegal(from_big_endian<big_word_t>(iw[0]));
-        }
+        unsigned int iw_size = Decoder.decode(iw, instr_SIF, true);
+        assert(iw_size != 0);
 
         // First pipeline is special.. handle branches and loads.
         const instruction_t *i0 = instr_SIF[0].I;

tests/CMakeLists.txt

@@ -381,33 +381,33 @@ test_elf_exit_sim(53 "r1 : 00000000")
 
 test_elf_exit_sim(54 "r1 : 0000007b   r2 : 000001c8")
 
-test_sim(55 "\\\\\\[Error\\\\\\] Illegal instruction: 8a861180.*PC : 00000014")
+test_sim(55 "\\\\\\[Error\\\\\\] Illegal instruction: 12882180.*PC : 00000014")
 
 test_sim_arg(55 "--permissive-dual-issue" "r3 : 0000007b   r4 : 000001c8")
 
 test_sim_arg(56 "--permissive-dual-issue" "\\\\\\[Error\\\\\\] Illegal instruction: Two simultaneously enabled load/store.*\\\\\\( p1\\\\\\) lwm r3 = \\\\\\[r1 \\\\\\+ 0\\\\\\]")
 
-test_sim(57 "\\\\\\[Error\\\\\\] Illegal instruction: 92c61180.*PC : 00000024")
+test_sim(57 "\\\\\\[Error\\\\\\] Illegal instruction: 1ac62200.*PC : 00000024")
 
 test_sim_arg(57 "--permissive-dual-issue" "r5 : 0000000c   r6 : 00000022")
 
 test_sim_arg(58 "--permissive-dual-issue" "\\\\\\[Error\\\\\\] Illegal instruction: Two simultaneously enabled load/store.*\\\\\\( p1\\\\\\) swm \\\\\\[r1 \\\\\\+ 0\\\\\\] = r3")
 
 test_sim_arg(59 "--permissive-dual-issue" "\\\\\\[Error\\\\\\] Illegal instruction: Two simultaneously enabled load/store.*\\\\\\( p7\\\\\\) lwc r3 = \\\\\\[r0 \\\\\\+ 0\\\\\\]")
 
-test_sim(60 "\\\\\\[Error\\\\\\] Illegal instruction: c4c00008.*PC : 00000014")
+test_sim(60 "\\\\\\[Error\\\\\\] Illegal instruction: 04c0000c.*PC : 00000014")
 
 test_sim_arg(60 "--permissive-dual-issue" "r1 : 0000007b   r2 : 000001c8   r3 : 0000009f   r4 : 000002f1")
 
 test_sim_arg(61 "--permissive-dual-issue" "\\\\\\[Error\\\\\\] Illegal instruction: Two simultaneously enabled control-flow operations.*br 8")
 
-test_sim(62 "\\\\\\[Error\\\\\\] Illegal instruction: acc00009")
+test_sim(62 "\\\\\\[Error\\\\\\] Illegal instruction: 4440001e")
 
 test_sim_arg(62 "--permissive-dual-issue" "r1 : 0000006f.*r2 : 000000de.*r3 : 0000014d.*r4 : 000001bc.*r5 : 0000022b.*r6 : 0000029a.*r7 : 00000309.*r8 : 00000378")
 
 test_sim_arg(63 "--permissive-dual-issue" "\\\\\\[Error\\\\\\] Illegal instruction: Two simultaneously enabled control-flow operations.*br 8")
 
-test_sim(64 "\\\\\\[Error\\\\\\] Illegal instruction: 800801c8")
+test_sim(64 "\\\\\\[Error\\\\\\] Illegal instruction: 02c00100")
 
 test_sim_arg(64 "--permissive-dual-issue" "r3 : 0000007b.*r4 : 000001c8.*r5 : 00000315")
 
@@ -421,7 +421,7 @@ test_sim_arg(69 "--permissive-dual-issue" "\\\\\\[Error\\\\\\] Illegal instructi
 
 test_sim_arg(70 "--permissive-dual-issue" "r1 : 0000007b.*r3 : 000001c8")
 
-test_sim(71 "\\\\\\[Error\\\\\\] Illegal instruction: 8006007b")
+test_sim(71 "\\\\\\[Error\\\\\\] Illegal instruction: 02001121")
 
 test_sim_arg(71 "--permissive-dual-issue" "r3 : 0000007b.*s2 : 00000002.*s3 : 00000001")