4 slices

rejunity · Mar 12, 2024 · f3463c4 · f3463c4
1 parent 0196b17
commit f3463c4
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Showing 2 changed files with 2 additions and 2 deletions.
diff --git a/src/1_58bit_mul.v b/src/1_58bit_mul.v
@@ -74,7 +74,7 @@ module systolic_array (
 
     output wire [7:0] out
 );
-    localparam SLICES = 2;
+    localparam SLICES = 4;
     localparam SLICE_BITS = $clog2(SLICES);
     localparam W = 1 * SLICES;
     localparam H = 4 * SLICES;

diff --git a/test/test.py b/test/test.py
@@ -7,7 +7,7 @@
 from cocotb.triggers import ClockCycles
 from utils import *
 
-COMPUTE_SLICES = 2
+COMPUTE_SLICES = 4
 
 def OUT(v):
     return v >> 8