Fixed memmap region mask initialization (#379 mapper 12).

src/core/mappers/mapper_006.c

@@ -330,6 +330,7 @@ struct _m006 {
 	BYTE scratch[0x1000];
 } m006;
 struct _m006tmp {
+	size_t old_prgrom_size;
 	BYTE *chr;
 } m006tmp;
 
@@ -351,16 +352,15 @@ void map_init_006(void) {
 	m006tmp.chr = NULL;
 
 	if ((info.reset == CHANGE_ROM) || (info.reset == POWER_UP)) {
+		m006tmp.old_prgrom_size = prgrom_size();
 		if (chrrom_size()) {
 			if (info.mapper.id != 12) {
 				if (vram_size(0) < chrrom_size()) {
 					vram_set_ram_size(0, chrrom_size());
 					m006tmp.chr = chrrom_pnt();
 				}
 			} else {
-				size_t old_size = prgrom_size();
-
-				if (old_size < S512K) {
+				if (m006tmp.old_prgrom_size < S512K) {
 					prgrom_pnt() = realloc(prgrom_pnt(), S512K);
 					prgrom_set_size(S512K);
 				}
@@ -408,10 +408,10 @@ void map_init_006(void) {
 		m006.chr.lock = FALSE;
 		m006.latch = 0;
 
-		m006.prg[0] = ~3;
-		m006.prg[1] = ~2;
-		m006.prg[2] = ~1;
-		m006.prg[3] = ~0;
+		m006.prg[0] = memmap_banks_from_size(S8K, m006tmp.old_prgrom_size) - 4;
+		m006.prg[1] = memmap_banks_from_size(S8K, m006tmp.old_prgrom_size) - 3;
+		m006.prg[2] = memmap_banks_from_size(S8K, m006tmp.old_prgrom_size) - 2;
+		m006.prg[3] = memmap_banks_from_size(S8K, m006tmp.old_prgrom_size) - 1;
 
 		m006.chr.reg[0] = 0;
 		m006.chr.reg[1] = 1;
@@ -532,7 +532,6 @@ void extcl_cpu_wr_mem_006(BYTE nidx, WORD address, BYTE value) {
 					//                   +-- 2M or 4M banking mode select if M=0
 					//                        0: 4M banking mode
 					//                        1: 2M banking mode
-
 					m006.mode.m2m4 = address & 0x03;
 					// The CC bits are mirrors of those in the latch at $8000-$FFFF.
 					m006.latch = (m006.latch & 0xFC) | (value & 0x03);

src/core/mappers/mapper_228.c

@@ -49,8 +49,8 @@ void extcl_after_mapper_init_228(void) {
 			memcpy(buffer, prgrom_pnt(), prgrom_size());
 
 			for (int i = 0x000000; i < 0x080000; i++) {
-				buffer[0x180000 +i] = buffer[0x100000 +i];
-				buffer[0x100000 +i] = (i >> 8) & 0xFF;
+				buffer[0x180000 + i] = buffer[0x100000 + i];
+				buffer[0x100000 + i] = (i >> 8) & 0xFF;
 			}
 
 			prgrom_set_size(size);

src/core/memmap.c

@@ -138,6 +138,9 @@ BYTE *memmap_chunk_pnt(BYTE nidx, DBWORD address) {
 	}
 	return (NULL);
 }
+WORD memmap_banks_from_size(enum _sizes_types chunk_size, size_t size) {
+	return (memmap_banks(chunk_size, size));
+}
 
 BYTE memmap_prg_region_init(BYTE nidx, size_t chunk_size) {
 	return (memmap_region_init(&nes[nidx].m.memmap.prg, MEMMAP_PRG_SIZE, chunk_size));
@@ -512,6 +515,7 @@ void prgrom_quit(void) {
 }
 void prgrom_set_size(size_t size) {
 	set_size(&prgrom_size(), &prgrom.real_size, nes[0].m.memmap.prg.info.chunk.size, size);
+	prgrom_mask() = calc_mask(prgrom_size());
 }
 void prgrom_reset_chunks(void) {
 	for (int nesidx = 0; nesidx < info.number_of_nes; nesidx++) {
@@ -661,6 +665,7 @@ void chrrom_quit(void) {
 }
 void chrrom_set_size(size_t size) {
 	set_size(&chrrom_size(), &chrrom.real_size, nes[0].m.memmap.chr.info.chunk.size, size);
+	chrrom_mask() = calc_mask(chrrom_size());
 }
 void chrrom_reset_chunks(void) {
 	for (int nesidx = 0; nesidx < info.number_of_nes; nesidx++) {
@@ -834,7 +839,6 @@ BYTE wram_init(void) {
 			wram_mask() = calc_mask(wram_size());
 			wram_ram_mask() = calc_mask(wram_ram_size());
 			wram_nvram_mask() = calc_mask(wram_nvram_size());
-
 			// resetto la wram
 			wram_reset_chunks();
 		}
@@ -855,11 +859,17 @@ void wram_set_ram_size(size_t size) {
 	wram.ram.size = pow_of_2(size);
 	wram_size() = wram_ram_size() + wram_nvram_size();
 	wram.real_size = pow_of_2(wram_size());
+	wram_mask() = calc_mask(wram_size());
+	wram_ram_mask() = calc_mask(wram_ram_size());
+	wram_nvram_mask() = calc_mask(wram_nvram_size());
 }
 void wram_set_nvram_size(size_t size) {
 	wram.nvram.size = pow_of_2(size);
 	wram_size() = wram_ram_size() + wram_nvram_size();
 	wram.real_size = pow_of_2(wram_size());
+	wram_mask() = calc_mask(wram_size());
+	wram_ram_mask() = calc_mask(wram_ram_size());
+	wram_nvram_mask() = calc_mask(wram_nvram_size());
 }
 void wram_reset_chunks(void) {
 	for (int nesidx = 0; nesidx < info.number_of_nes; nesidx++) {
@@ -1197,6 +1207,9 @@ void vram_set_ram_size(BYTE nidx, size_t size) {
 	nes[nidx].m.vram.ram.size = pow_of_2(size);
 	vram_size(nidx) = vram_ram_size(nidx) + vram_nvram_size(nidx);
 	nes[nidx].m.vram.real_size = pow_of_2(vram_size(nidx));
+	vram_mask(nidx) = calc_mask(vram_size(nidx));
+	vram_ram_mask(nidx) = calc_mask(vram_ram_size(nidx));
+	vram_nvram_mask(nidx) = calc_mask(vram_nvram_size(nidx));
 }
 void vram_set_nvram_size(BYTE nidx, size_t size) {
 	nes[nidx].m.vram.nvram.size = pow_of_2(size);
@@ -1336,6 +1349,7 @@ void ram_quit(void) {
 }
 void ram_set_size(BYTE nidx, size_t size) {
 	set_size(&ram_size(nidx), &nes[nidx].m.ram.real_size, nes[nidx].m.memmap.ram.info.chunk.size, size);
+	ram_mask(nidx) = calc_mask(ram_size(nidx));
 }
 void ram_reset_chunks(void) {
 	for (int nesidx = 0; nesidx < info.number_of_nes; nesidx++) {
@@ -1451,6 +1465,7 @@ void nmt_quit(void) {
 }
 void nmt_set_size(BYTE nidx, size_t size) {
 	set_size(&nmt_size(nidx), &nes[nidx].m.nmt.real_size, nes[nidx].m.memmap.nmt.info.chunk.size, size);
+	nmt_mask(nidx) = calc_mask(nmt_size(nidx));
 }
 void nmt_reset_chunks(void) {
 	for (int nesidx = 0; nesidx < info.number_of_nes; nesidx++) {

src/core/memmap.h

@@ -280,6 +280,7 @@ EXTERNC BYTE memmap_adr_is_readable(BYTE nidx, DBWORD address);
 EXTERNC BYTE memmap_adr_is_writable(BYTE nidx, DBWORD address);
 EXTERNC WORD memmap_chunk_actual_bank(BYTE nidx, DBWORD address);
 EXTERNC BYTE *memmap_chunk_pnt(BYTE nidx, DBWORD address);
+EXTERNC WORD memmap_banks_from_size(enum _sizes_types chunk_size, size_t size);
 
 EXTERNC BYTE memmap_prg_region_init(BYTE nidx, size_t chunk_size);
 EXTERNC BYTE memmap_chr_region_init(BYTE nidx, size_t chunk_size);