Fix #2665 #2400 #2657 (#2685)

* Fix #2400: define new PmpNapotEn parameter to disable NAPOT * Fix #2665 by removing NA4 related RTL lines * Fix Spyglass * Fix gate count
openhwgroup · Jan 7, 2025 · 2155d0e · 2155d0e
1 parent 86a80f0
commit 2155d0e
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Showing 21 changed files with 26 additions and 9 deletions.
diff --git a/.gitlab-ci/expected_synth.yml b/.gitlab-ci/expected_synth.yml
@@ -1,2 +1,2 @@
 cv32a65x:
-  gates: 188652
+  gates: 184679
diff --git a/core/csr_regfile.sv b/core/csr_regfile.sv
@@ -2680,8 +2680,8 @@ module csr_regfile
         if (!CVA6Cfg.PMPEntryReadOnly[i]) begin
           // PMP locked logic is handled in the CSR write process above
           pmpcfg_next[i] = pmpcfg_d[i];
-          // We only support >=8-byte granularity, NA4 is disabled
-          if (pmpcfg_d[i].addr_mode == riscv::NA4) begin
+          // We only support >=8-byte granularity, NA4 is not supported
+          if ((!CVA6Cfg.PMPNapotEn && pmpcfg_d[i].addr_mode == riscv::NAPOT) ||pmpcfg_d[i].addr_mode == riscv::NA4) begin
             pmpcfg_next[i].addr_mode = pmpcfg_q[i].addr_mode;
           end
           // Follow collective WARL spec for RWX fields

diff --git a/core/include/build_config_pkg.sv b/core/include/build_config_pkg.sv
@@ -108,6 +108,7 @@ package build_config_pkg;
     cfg.PMPCfgRstVal = CVA6Cfg.PMPCfgRstVal;
     cfg.PMPAddrRstVal = CVA6Cfg.PMPAddrRstVal;
     cfg.PMPEntryReadOnly = CVA6Cfg.PMPEntryReadOnly;
+    cfg.PMPNapotEn = CVA6Cfg.PMPNapotEn;
     cfg.NOCType = CVA6Cfg.NOCType;
     cfg.NrNonIdempotentRules = CVA6Cfg.NrNonIdempotentRules;
     cfg.NonIdempotentAddrBase = CVA6Cfg.NonIdempotentAddrBase;

diff --git a/core/include/config_pkg.sv b/core/include/config_pkg.sv
@@ -112,6 +112,8 @@ package config_pkg;
     logic [63:0][63:0]           PMPAddrRstVal;
     // PMP CSR read-only bits
     bit [63:0]                   PMPEntryReadOnly;
+    // PMP NA4 and NAPOT mode enable
+    bit                          PMPNapotEn;
     // PMA non idempotent rules number
     int unsigned                 NrNonIdempotentRules;
     // PMA NonIdempotent region base address
@@ -291,6 +293,7 @@ package config_pkg;
     logic [63:0][63:0]           PMPCfgRstVal;
     logic [63:0][63:0]           PMPAddrRstVal;
     bit [63:0]                   PMPEntryReadOnly;
+    bit                          PMPNapotEn;
     noc_type_e                   NOCType;
     int unsigned                 NrNonIdempotentRules;
     logic [NrMaxRules-1:0][63:0] NonIdempotentAddrBase;

diff --git a/core/include/cv32a60x_config_pkg.sv b/core/include/cv32a60x_config_pkg.sv
@@ -67,6 +67,7 @@ package cva6_config_pkg;
       PMPCfgRstVal: {64{64'h0}},
       PMPAddrRstVal: {64{64'h0}},
       PMPEntryReadOnly: 64'd0,
+      PMPNapotEn: bit'(0),
       NOCType: config_pkg::NOC_TYPE_AXI4_ATOP,
       NrNonIdempotentRules: unsigned'(0),
       NonIdempotentAddrBase: 1024'({64'b0, 64'b0}),

diff --git a/core/include/cv32a65x_config_pkg.sv b/core/include/cv32a65x_config_pkg.sv
@@ -67,6 +67,7 @@ package cva6_config_pkg;
       PMPCfgRstVal: {64{64'h0}},
       PMPAddrRstVal: {64{64'h0}},
       PMPEntryReadOnly: 64'd0,
+      PMPNapotEn: bit'(0),
       NOCType: config_pkg::NOC_TYPE_AXI4_ATOP,
       NrNonIdempotentRules: unsigned'(0),
       NonIdempotentAddrBase: 1024'({64'b0, 64'b0}),

diff --git a/core/include/cv32a6_embedded_config_pkg_deprecated.sv b/core/include/cv32a6_embedded_config_pkg_deprecated.sv
@@ -118,6 +118,7 @@ package cva6_config_pkg;
       PMPCfgRstVal: {64{64'h0}},
       PMPAddrRstVal: {64{64'h0}},
       PMPEntryReadOnly: 64'd0,
+      PMPNapotEn: bit'(1),
       NOCType: config_pkg::NOC_TYPE_AXI4_ATOP,
       NrNonIdempotentRules: unsigned'(2),
       NonIdempotentAddrBase: 1024'({64'b0, 64'b0}),

diff --git a/core/include/cv32a6_ima_sv32_fpga_config_pkg.sv b/core/include/cv32a6_ima_sv32_fpga_config_pkg.sv
@@ -119,6 +119,7 @@ package cva6_config_pkg;
       PMPCfgRstVal: {64{64'h0}},
       PMPAddrRstVal: {64{64'h0}},
       PMPEntryReadOnly: 64'd0,
+      PMPNapotEn: bit'(1),
       NOCType: config_pkg::NOC_TYPE_AXI4_ATOP,
       NrNonIdempotentRules: unsigned'(2),
       NonIdempotentAddrBase: 1024'({64'b0, 64'b0}),

diff --git a/core/include/cv32a6_imac_sv0_config_pkg.sv b/core/include/cv32a6_imac_sv0_config_pkg.sv
@@ -119,6 +119,7 @@ package cva6_config_pkg;
       PMPCfgRstVal: {64{64'h0}},
       PMPAddrRstVal: {64{64'h0}},
       PMPEntryReadOnly: 64'd0,
+      PMPNapotEn: bit'(1),
       NOCType: config_pkg::NOC_TYPE_AXI4_ATOP,
       NrNonIdempotentRules: unsigned'(2),
       NonIdempotentAddrBase: 1024'({64'b0, 64'b0}),

diff --git a/core/include/cv32a6_imac_sv32_config_pkg.sv b/core/include/cv32a6_imac_sv32_config_pkg.sv
@@ -118,6 +118,7 @@ package cva6_config_pkg;
       PMPCfgRstVal: {64{64'h0}},
       PMPAddrRstVal: {64{64'h0}},
       PMPEntryReadOnly: 64'd0,
+      PMPNapotEn: bit'(1),
       NOCType: config_pkg::NOC_TYPE_AXI4_ATOP,
       NrNonIdempotentRules: unsigned'(1),
       NonIdempotentAddrBase: 1024'({64'b0}),

diff --git a/core/include/cv32a6_imafc_sv32_config_pkg.sv b/core/include/cv32a6_imafc_sv32_config_pkg.sv
@@ -119,6 +119,7 @@ package cva6_config_pkg;
       PMPCfgRstVal: {64{64'h0}},
       PMPAddrRstVal: {64{64'h0}},
       PMPEntryReadOnly: 64'd0,
+      PMPNapotEn: bit'(1),
       NOCType: config_pkg::NOC_TYPE_AXI4_ATOP,
       NrNonIdempotentRules: unsigned'(2),
       NonIdempotentAddrBase: 1024'({64'b0, 64'b0}),

diff --git a/core/include/cv64a6_imadfcv_sv39_polara_config_pkg.sv b/core/include/cv64a6_imadfcv_sv39_polara_config_pkg.sv
@@ -119,6 +119,7 @@ package cva6_config_pkg;
       PMPCfgRstVal: {64{64'h0}},
       PMPAddrRstVal: {64{64'h0}},
       PMPEntryReadOnly: 64'd0,
+      PMPNapotEn: bit'(1),
       NOCType: config_pkg::NOC_TYPE_L15_BIG_ENDIAN,
       NrNonIdempotentRules: unsigned'(2),
       NonIdempotentAddrBase: 1024'({64'b0, 64'b0}),

diff --git a/core/include/cv64a6_imafdc_sv39_config_pkg.sv b/core/include/cv64a6_imafdc_sv39_config_pkg.sv
@@ -119,6 +119,7 @@ package cva6_config_pkg;
       PMPCfgRstVal: {64{64'h0}},
       PMPAddrRstVal: {64{64'h0}},
       PMPEntryReadOnly: 64'd0,
+      PMPNapotEn: bit'(1),
       NOCType: config_pkg::NOC_TYPE_AXI4_ATOP,
       NrNonIdempotentRules: unsigned'(2),
       NonIdempotentAddrBase: 1024'({64'b0, 64'b0}),

diff --git a/core/include/cv64a6_imafdc_sv39_hpdcache_config_pkg.sv b/core/include/cv64a6_imafdc_sv39_hpdcache_config_pkg.sv
@@ -126,6 +126,7 @@ package cva6_config_pkg;
       PMPCfgRstVal: {64{64'h0}},
       PMPAddrRstVal: {64{64'h0}},
       PMPEntryReadOnly: 64'd0,
+      PMPNapotEn: bit'(1),
       NOCType: config_pkg::NOC_TYPE_AXI4_ATOP,
       NrNonIdempotentRules: unsigned'(2),
       NonIdempotentAddrBase: 1024'({64'b0, 64'b0}),

diff --git a/core/include/cv64a6_imafdc_sv39_openpiton_config_pkg.sv b/core/include/cv64a6_imafdc_sv39_openpiton_config_pkg.sv
@@ -119,6 +119,7 @@ package cva6_config_pkg;
       PMPCfgRstVal: {64{64'h0}},
       PMPAddrRstVal: {64{64'h0}},
       PMPEntryReadOnly: 64'd0,
+      PMPNapotEn: bit'(1),
       NOCType: config_pkg::NOC_TYPE_L15_BIG_ENDIAN,
       NrNonIdempotentRules: unsigned'(2),
       NonIdempotentAddrBase: 1024'({64'b0, 64'b0}),

diff --git a/core/include/cv64a6_imafdc_sv39_wb_config_pkg.sv b/core/include/cv64a6_imafdc_sv39_wb_config_pkg.sv
@@ -119,6 +119,7 @@ package cva6_config_pkg;
       PMPCfgRstVal: {64{64'h0}},
       PMPAddrRstVal: {64{64'h0}},
       PMPEntryReadOnly: 64'd0,
+      PMPNapotEn: bit'(1),
       NOCType: config_pkg::NOC_TYPE_AXI4_ATOP,
       NrNonIdempotentRules: unsigned'(2),
       NonIdempotentAddrBase: 1024'({64'b0, 64'b0}),

diff --git a/core/include/cv64a6_imafdch_sv39_config_pkg.sv b/core/include/cv64a6_imafdch_sv39_config_pkg.sv
@@ -119,6 +119,7 @@ package cva6_config_pkg;
       PMPCfgRstVal: {64{64'h0}},
       PMPAddrRstVal: {64{64'h0}},
       PMPEntryReadOnly: 64'd0,
+      PMPNapotEn: bit'(1),
       NOCType: config_pkg::NOC_TYPE_AXI4_ATOP,
       NrNonIdempotentRules: unsigned'(2),
       NonIdempotentAddrBase: 1024'({64'b0, 64'b0}),

diff --git a/core/include/cv64a6_imafdch_sv39_wb_config_pkg.sv b/core/include/cv64a6_imafdch_sv39_wb_config_pkg.sv
@@ -119,6 +119,7 @@ package cva6_config_pkg;
       PMPCfgRstVal: {64{64'h0}},
       PMPAddrRstVal: {64{64'h0}},
       PMPEntryReadOnly: 64'd0,
+      PMPNapotEn: bit'(1),
       NOCType: config_pkg::NOC_TYPE_AXI4_ATOP,
       NrNonIdempotentRules: unsigned'(2),
       NonIdempotentAddrBase: 1024'({64'b0, 64'b0}),

diff --git a/core/include/cv64a6_imafdcv_sv39_config_pkg.sv b/core/include/cv64a6_imafdcv_sv39_config_pkg.sv
@@ -119,6 +119,7 @@ package cva6_config_pkg;
       PMPCfgRstVal: {64{64'h0}},
       PMPAddrRstVal: {64{64'h0}},
       PMPEntryReadOnly: 64'd0,
+      PMPNapotEn: bit'(1),
       NOCType: config_pkg::NOC_TYPE_AXI4_ATOP,
       NrNonIdempotentRules: unsigned'(2),
       NonIdempotentAddrBase: 1024'({64'b0, 64'b0}),

diff --git a/core/include/cv64a6_mmu_config_pkg.sv b/core/include/cv64a6_mmu_config_pkg.sv
@@ -74,6 +74,7 @@ package cva6_config_pkg;
       PMPCfgRstVal: {64{64'h0}},
       PMPAddrRstVal: {64{64'h0}},
       PMPEntryReadOnly: 64'd0,
+      PMPNapotEn: bit'(1),
       NOCType: config_pkg::NOC_TYPE_AXI4_ATOP,
       NrNonIdempotentRules: unsigned'(2),
       NonIdempotentAddrBase: 1024'({64'b0, 64'b0}),

diff --git a/core/pmp/src/pmp_entry.sv b/core/pmp/src/pmp_entry.sv
@@ -64,13 +64,10 @@ module pmp_entry #(
         // synthesis translate_on
 
       end
-      riscv::NA4, riscv::NAPOT: begin
+      riscv::NAPOT: begin
 
-        if (conf_addr_mode_i == riscv::NA4) size = 2;
-        else begin
-          // use the extracted trailing ones
-          size = {{(32 - $clog2(PLEN)) {1'b0}}, trail_ones} + 3;
-        end
+        // use the extracted trailing ones
+        size = {{(32 - $clog2(PLEN)) {1'b0}}, trail_ones} + 3;
 
         mask = '1 << size;
         base = ({2'b0, conf_addr_i} << 2) & mask;