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mmap: remove offset logic #82

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3 changes: 1 addition & 2 deletions litespi/core/mmap.py
Original file line number Diff line number Diff line change
Expand Up @@ -80,7 +80,6 @@ def __init__(self, flash, clock_domain="sys", endianness="big", with_csr=True, w
self.sink = sink = stream.Endpoint(spi_phy2core_layout)
self.bus = bus = wishbone.Interface()
self.cs = cs = Signal()
self.offset = offset = Signal(len(bus.adr))

# Burst Control.
burst_cs = Signal()
Expand Down Expand Up @@ -208,7 +207,7 @@ def __init__(self, flash, clock_domain="sys", endianness="big", with_csr=True, w
source.valid.eq(1),
source.width.eq(flash.addr_width),
source.mask.eq(addr_oe_mask[flash.addr_width]),
source.data.eq(Cat(byte_count, bus.adr - offset)), # send address.
source.data.eq(Cat(byte_count, bus.adr)), # send address.
source.len.eq(flash.addr_bits),
NextValue(burst_cs, 1),
NextValue(burst_adr, bus.adr),
Expand Down
8 changes: 3 additions & 5 deletions test/test_spi_mmap.py
Original file line number Diff line number Diff line change
Expand Up @@ -40,11 +40,10 @@ def test_spi_mmap_write_test(self):
opcode = Codes.PP_1_1_1
dut = LiteSPIMMAP(flash=self.DummyChip(Codes.READ_1_1_1, [], program_cmd=opcode), with_write=True)

def wb_gen(dut, addr, data, offset):
def wb_gen(dut, addr, data):
dut.done = 0

yield dut.offset.eq(offset)
yield from dut.bus.write(addr + offset, data)
yield from dut.bus.write(addr, data)

dut.done = 1

Expand Down Expand Up @@ -90,9 +89,8 @@ def phy_gen(dut, addr, data):
yield
addr = 0xcafe
data = 0xdeadbeef
offset = 0x10000

run_simulation(dut, [wb_gen(dut, addr, data, offset), phy_gen(dut, addr, data)])
run_simulation(dut, [wb_gen(dut, addr, data), phy_gen(dut, addr, data)])
self.assertEqual(dut.done, 1)
self.assertEqual(dut.addr_ok, 1)
self.assertEqual(dut.opcode_ok, 1)
Expand Down