Update man page

kimwalisch · Dec 2, 2022 · 455015c · 455015c
1 parent 4af2280
commit 455015c
Showing 1 changed file with 3 additions and 3 deletions.
diff --git a/doc/primesieve.1 b/doc/primesieve.1
@@ -2,12 +2,12 @@
 .\"     Title: primesieve
 .\"    Author: [see the "AUTHOR" section]
 .\" Generator: DocBook XSL Stylesheets vsnapshot <http://docbook.sf.net/>
-.\"      Date: 08/22/2022
+.\"      Date: 12/02/2022
 .\"    Manual: \ \&
 .\"    Source: \ \&
 .\"  Language: English
 .\"
-.TH "PRIMESIEVE" "1" "08/22/2022" "\ \&" "\ \&"
+.TH "PRIMESIEVE" "1" "12/02/2022" "\ \&" "\ \&"
 .\" -----------------------------------------------------------------
 .\" * Define some portability stuff
 .\" -----------------------------------------------------------------
@@ -110,7 +110,7 @@ Quiet mode, prints less output\&.
 .PP
 \fB\-s, \-\-size\fR=\fISIZE\fR
 .RS 4
-Set the size of the sieve array in KiB, 8 <=
+Set the size of the sieve array in KiB, 16 <=
 \fISIZE\fR
 <= 8192\&. By default primesieve uses a sieve size that matches your CPU\(cqs L1 cache size (per core) or is slightly smaller than your CPU\(cqs L2 cache size\&. This setting is crucial for performance, on exotic CPUs primesieve sometimes fails to determine the CPU\(cqs cache sizes which usually causes a big slowdown\&. In this case you can get a significant speedup by manually setting the sieve size to your CPU\(cqs L1 or L2 cache size (per core)\&.
 .RE