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Re-generate peripherals with enum name checks
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See the CHANGELOG addition for more context. This commit fixes the
*SELECT_INPUT* names by changing the combiner behavior; see the parent
commits for more information.
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@mciantyre
mciantyre committed Jul 1, 2023
1 parent ea4f053 commit 1e5e196
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Showing 9 changed files with 2,774 additions and 2,770 deletions.
4 changes: 4 additions & 0 deletions CHANGELOG.md
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Expand Up @@ -30,6 +30,10 @@ and correct the documentation.
**BREAKING** Correct the name, documentation of the SNVS.LPCR field "LVD_EN" on
the 1176.

**BREAKING** Correct the symbols for most IOMUXC `*SELECT_INPUT*` enum variants.
As a result of this change, symbols for IOMUXC `SW_MUX_CTL*` and `*SW_PAD_CTL*`
enum variants may have also changed.

## [0.5.0] 2022-12-27

Add support for NXP's i.MX RT 1176 dual-core MCUs. An `"imxrt1176_cm7"` feature
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16 changes: 8 additions & 8 deletions src/blocks/imxrt1015/iomuxc_snvs.rs
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Expand Up @@ -68,8 +68,8 @@ pub mod SW_PAD_CTL_PAD_TEST_MODE {
pub mod RW {
#[doc = "output driver disabled;"]
pub const DSE_0_OUTPUT_DRIVER_DISABLED_: u32 = 0;
#[doc = "R0(150 Ohm @ 3.3V, 260 [email protected])"]
pub const DSE_1_R0_150_OHM___3_3V__260_OHM_1_8V: u32 = 0x01;
#[doc = "R0(260 Ohm @ 3.3V, 150 [email protected], 240 Ohm for DDR)"]
pub const DSE_1_R0_260_OHM___3_3V__150_OHM_1_8V__240_OHM_FOR_DDR_: u32 = 0x01;
#[doc = "R0/2"]
pub const DSE_2_R0_2: u32 = 0x02;
#[doc = "R0/3"]
Expand Down Expand Up @@ -189,8 +189,8 @@ pub mod SW_PAD_CTL_PAD_POR_B {
pub mod RW {
#[doc = "output driver disabled;"]
pub const DSE_0_OUTPUT_DRIVER_DISABLED_: u32 = 0;
#[doc = "R0(150 Ohm @ 3.3V, 260 [email protected])"]
pub const DSE_1_R0_150_OHM___3_3V__260_OHM_1_8V: u32 = 0x01;
#[doc = "R0(260 Ohm @ 3.3V, 150 [email protected], 240 Ohm for DDR)"]
pub const DSE_1_R0_260_OHM___3_3V__150_OHM_1_8V__240_OHM_FOR_DDR_: u32 = 0x01;
#[doc = "R0/2"]
pub const DSE_2_R0_2: u32 = 0x02;
#[doc = "R0/3"]
Expand Down Expand Up @@ -310,8 +310,8 @@ pub mod SW_PAD_CTL_PAD_ONOFF {
pub mod RW {
#[doc = "output driver disabled;"]
pub const DSE_0_OUTPUT_DRIVER_DISABLED_: u32 = 0;
#[doc = "R0(150 Ohm @ 3.3V, 260 [email protected])"]
pub const DSE_1_R0_150_OHM___3_3V__260_OHM_1_8V: u32 = 0x01;
#[doc = "R0(260 Ohm @ 3.3V, 150 [email protected], 240 Ohm for DDR)"]
pub const DSE_1_R0_260_OHM___3_3V__150_OHM_1_8V__240_OHM_FOR_DDR_: u32 = 0x01;
#[doc = "R0/2"]
pub const DSE_2_R0_2: u32 = 0x02;
#[doc = "R0/3"]
Expand Down Expand Up @@ -431,8 +431,8 @@ pub mod SW_PAD_CTL_PAD_PMIC_ON_REQ {
pub mod RW {
#[doc = "output driver disabled;"]
pub const DSE_0_OUTPUT_DRIVER_DISABLED_: u32 = 0;
#[doc = "R0(150 Ohm @ 3.3V, 260 [email protected])"]
pub const DSE_1_R0_150_OHM___3_3V__260_OHM_1_8V: u32 = 0x01;
#[doc = "R0(260 Ohm @ 3.3V, 150 [email protected], 240 Ohm for DDR)"]
pub const DSE_1_R0_260_OHM___3_3V__150_OHM_1_8V__240_OHM_FOR_DDR_: u32 = 0x01;
#[doc = "R0/2"]
pub const DSE_2_R0_2: u32 = 0x02;
#[doc = "R0/3"]
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24 changes: 12 additions & 12 deletions src/blocks/imxrt1021/iomuxc.rs
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Expand Up @@ -16720,10 +16720,10 @@ pub mod LPSPI1_SCK_SELECT_INPUT {
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Selecting Pad: GPIO_AD_06 for Mode: ALT0"]
pub const GPIO_AD_06_ALT0: u32 = 0;
#[doc = "Selecting Pad: GPIO_SD_08 for Mode: ALT2"]
pub const GPIO_SD_08_ALT2: u32 = 0x01;
#[doc = "Selecting Pad: GPIO_SD_B0_02 for Mode: ALT4"]
pub const GPIO_SD_B0_02_ALT4: u32 = 0;
#[doc = "Selecting Pad: GPIO_AD_B0_10 for Mode: ALT1"]
pub const GPIO_AD_B0_10_ALT1: u32 = 0x01;
}
}
}
Expand All @@ -16736,10 +16736,10 @@ pub mod LPSPI1_SDI_SELECT_INPUT {
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Selecting Pad: GPIO_AD_03 for Mode: ALT0"]
pub const GPIO_AD_03_ALT0: u32 = 0;
#[doc = "Selecting Pad: GPIO_SD_05 for Mode: ALT2"]
pub const GPIO_SD_05_ALT2: u32 = 0x01;
#[doc = "Selecting Pad: GPIO_SD_B0_05 for Mode: ALT4"]
pub const GPIO_SD_B0_05_ALT4: u32 = 0;
#[doc = "Selecting Pad: GPIO_AD_B0_13 for Mode: ALT1"]
pub const GPIO_AD_B0_13_ALT1: u32 = 0x01;
}
}
}
Expand All @@ -16752,10 +16752,10 @@ pub mod LPSPI1_SDO_SELECT_INPUT {
pub mod R {}
pub mod W {}
pub mod RW {
#[doc = "Selecting Pad: GPIO_AD_04 for Mode: ALT0"]
pub const GPIO_AD_04_ALT0: u32 = 0;
#[doc = "Selecting Pad: GPIO_SD_06 for Mode: ALT2"]
pub const GPIO_SD_06_ALT2: u32 = 0x01;
#[doc = "Selecting Pad: GPIO_SD_B0_04 for Mode: ALT4"]
pub const GPIO_SD_B0_04_ALT4: u32 = 0;
#[doc = "Selecting Pad: GPIO_AD_B0_12 for Mode: ALT1"]
pub const GPIO_AD_B0_12_ALT1: u32 = 0x01;
}
}
}
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16 changes: 8 additions & 8 deletions src/blocks/imxrt1021/iomuxc_snvs.rs
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Expand Up @@ -131,8 +131,8 @@ pub mod SW_PAD_CTL_PAD_TEST_MODE {
pub mod RW {
#[doc = "output driver disabled;"]
pub const DSE_0_OUTPUT_DRIVER_DISABLED_: u32 = 0;
#[doc = "R0(150 Ohm @ 3.3V, 260 [email protected])"]
pub const DSE_1_R0_150_OHM___3_3V__260_OHM_1_8V: u32 = 0x01;
#[doc = "R0(260 Ohm @ 3.3V, 150 [email protected], 240 Ohm for DDR)"]
pub const DSE_1_R0_260_OHM___3_3V__150_OHM_1_8V__240_OHM_FOR_DDR_: u32 = 0x01;
#[doc = "R0/2"]
pub const DSE_2_R0_2: u32 = 0x02;
#[doc = "R0/3"]
Expand Down Expand Up @@ -252,8 +252,8 @@ pub mod SW_PAD_CTL_PAD_POR_B {
pub mod RW {
#[doc = "output driver disabled;"]
pub const DSE_0_OUTPUT_DRIVER_DISABLED_: u32 = 0;
#[doc = "R0(150 Ohm @ 3.3V, 260 [email protected])"]
pub const DSE_1_R0_150_OHM___3_3V__260_OHM_1_8V: u32 = 0x01;
#[doc = "R0(260 Ohm @ 3.3V, 150 [email protected], 240 Ohm for DDR)"]
pub const DSE_1_R0_260_OHM___3_3V__150_OHM_1_8V__240_OHM_FOR_DDR_: u32 = 0x01;
#[doc = "R0/2"]
pub const DSE_2_R0_2: u32 = 0x02;
#[doc = "R0/3"]
Expand Down Expand Up @@ -373,8 +373,8 @@ pub mod SW_PAD_CTL_PAD_ONOFF {
pub mod RW {
#[doc = "output driver disabled;"]
pub const DSE_0_OUTPUT_DRIVER_DISABLED_: u32 = 0;
#[doc = "R0(150 Ohm @ 3.3V, 260 [email protected])"]
pub const DSE_1_R0_150_OHM___3_3V__260_OHM_1_8V: u32 = 0x01;
#[doc = "R0(260 Ohm @ 3.3V, 150 [email protected], 240 Ohm for DDR)"]
pub const DSE_1_R0_260_OHM___3_3V__150_OHM_1_8V__240_OHM_FOR_DDR_: u32 = 0x01;
#[doc = "R0/2"]
pub const DSE_2_R0_2: u32 = 0x02;
#[doc = "R0/3"]
Expand Down Expand Up @@ -615,8 +615,8 @@ pub mod SW_PAD_CTL_PAD_PMIC_ON_REQ {
pub mod RW {
#[doc = "output driver disabled;"]
pub const DSE_0_OUTPUT_DRIVER_DISABLED_: u32 = 0;
#[doc = "R0(150 Ohm @ 3.3V, 260 [email protected])"]
pub const DSE_1_R0_150_OHM___3_3V__260_OHM_1_8V: u32 = 0x01;
#[doc = "R0(260 Ohm @ 3.3V, 150 [email protected], 240 Ohm for DDR)"]
pub const DSE_1_R0_260_OHM___3_3V__150_OHM_1_8V__240_OHM_FOR_DDR_: u32 = 0x01;
#[doc = "R0/2"]
pub const DSE_2_R0_2: u32 = 0x02;
#[doc = "R0/3"]
Expand Down
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