feat: implement LD, ADD #8
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Kelvinyu1117
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gapry
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Jun 4, 2024
arabica/cpu/cpu.cpp
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| @@ -1,13 +1,13 @@ | |||
| #include "op_code.hpp" | |||
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I have already included op_code.hpp in <arabica/cpu/cpu.hpp>
| @@ -37,6 +55,26 @@ void CPU::run(const Memory& memory) { | |||
| // ToDo: raise interrupt? how to test the failed case? | |||
| }; | |||
| } break; | |||
| case OP_CODE::LD_Vx_byte: { | |||
| uint8_t byte_v = instruction & 0x00FF; | |||
| registers[(instruction & 0x0F00) >> 8] = byte_v; | |||
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Instruction execution should advance PC?
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My bad, fixed, thanks.
gapry
reviewed
Jun 4, 2024
arabica/cpu/cpu.cpp
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| #include <arabica/cpu/cpu.hpp> | ||
| #include <fmt/core.h> | ||
|
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| namespace arabica { | ||
|
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| void CPU::run(const Memory& memory) { | ||
| instruction = memory[pc] << 8 | memory[pc + 1]; | ||
| uint16_t prefix = instruction & 0xF000; | ||
| uint16_t prefix = (instruction & 0xF000) >> 12; |
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I think it doesn’t need to shift left.
uint16_t prefix = instruction & 0xF000;
opcode = static_cast<OP_CODE>(prefix);If the prefix doesn't repeat, we already get the opcode.
Therefore, there's no need to handle the cases for 0x1, 0x2, 0x6, and 0x7.
case 0x1: {
opcode = OP_CODE::JP_addr;
} break;
case 0x2: {
opcode = OP_CODE::CALL_addr;
} break;
case 0x6: {
opcode = OP_CODE::LD_Vx_byte;
} break;
case 0x7: {
opcode = OP_CODE::ADD_Vx_byte;
} break;There was a problem hiding this comment.
You are correct, we should only handle the special cases, fixed, thanks.
|
LGTM |
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Implemented Instructions:
LD Vx, byteADD Vx, byteLD Vx, VyADD Vx, Vy