Move RocketConfigs to rocket.Configs

chipsalliance · Jun 30, 2024 · c558393 · c558393
1 parent 50559ea
commit c558393
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Showing 2 changed files with 3 additions and 3 deletions.
diff --git a/src/main/scala/subsystem/RocketConfigs.scala → src/main/scala/rocket/Configs.scala b/src/main/scala/subsystem/RocketConfigs.scala → src/main/scala/rocket/Configs.scala
@@ -1,13 +1,12 @@
-package freechips.rocketchip.subsystem
-// TODO move to freechips.rocketchip.rocket
+package freechips.rocketchip.rocket
 
 import chisel3.util._
 
 import org.chipsalliance.cde.config._
 import org.chipsalliance.diplomacy.lazymodule._
 
 import freechips.rocketchip.prci.{SynchronousCrossing, AsynchronousCrossing, RationalCrossing, ClockCrossingType}
-import freechips.rocketchip.rocket.{RocketCoreParams, MulDivParams, DCacheParams, ICacheParams, BTBParams, DebugROBParams}
+import freechips.rocketchip.subsystem.{TilesLocated, NumTiles, HierarchicalLocation, RocketCrossingParams, SystemBusKey, CacheBlockBytes, RocketTileAttachParams, InSubsystem, InCluster, HierarchicalElementMasterPortParams, HierarchicalElementSlavePortParams, CBUS, CCBUS, ClustersLocated, TileAttachConfig, CloneTileAttachParams}
 import freechips.rocketchip.tile.{RocketTileParams}
 import scala.reflect.ClassTag
 

diff --git a/src/main/scala/system/Configs.scala b/src/main/scala/system/Configs.scala
@@ -5,6 +5,7 @@ package freechips.rocketchip.system
 
 import org.chipsalliance.cde.config.Config
 import freechips.rocketchip.subsystem._
+import freechips.rocketchip.rocket.{WithNBigCores, WithNMedCores, WithNSmallCores, WithRV32, WithFP16, WithHypervisor, With1TinyCore, WithScratchpadsOnly, WithCloneRocketTiles}
 
 class WithJtagDTMSystem extends freechips.rocketchip.subsystem.WithJtagDTM
 class WithDebugSBASystem extends freechips.rocketchip.subsystem.WithDebugSBA