squash merge pre3 branch:

  * prepare merge with dbgui
  * drop python 2.7 support
  * rework subpackage/module imports and logging
  * various code sanitizing
  * blackified sources

README.rst

@@ -49,7 +49,7 @@ It features:
   which relies on SAT/SMT solvers to proceed with discovering the control
   flow graph or even to implement techniques like DARE (Directed Automated
   Random Exploration).
-- various generic "helpers" and arch-dependent pretty printers to allow
+- various generic *helpers* and arch-dependent pretty printers to allow
   custom look-and-feel configurations (think AT&T vs. Intel syntax,
   absolute vs. relative offsets, decimal or hex immediates, etc).
 
@@ -83,6 +83,14 @@ Please see `LICENSE`_.
 Changelog
 =========
 
+- `v2.9.2`_
+
+  * prepare merge with dbgui
+  * drop python 2.7 support
+  * rework subpackage/module imports and logging
+  * various code sanitizing
+  * blackified sources
+
 - `v2.9.1`_
 
   * add Mach-O loader and system.osx skeleton
@@ -318,6 +326,7 @@ Changelog
 .. _ply: http://www.dabeaz.com/ply/
 .. _sqlalchemy: http://www.sqlalchemy.org
 .. _LICENSE: https://github.com/bdcht/amoco/blob/release/LICENSE
+.. _v2.9.2: https://github.com/bdcht/amoco/releases/tag/v2.9.2
 .. _v2.9.1: https://github.com/bdcht/amoco/releases/tag/v2.9.1
 .. _v2.9.0: https://github.com/bdcht/amoco/releases/tag/v2.9.0
 .. _v2.6.3: https://github.com/bdcht/amoco/releases/tag/v2.6.3

amoco/__init__.py

@@ -1,3 +1 @@
-# -*- coding: utf-8 -*-
 from .main import *
-

amoco/arch/arm/cpu_armv7.py

@@ -5,29 +5,33 @@
 # published under GPLv2 license
 
 from amoco.arch.arm.v7.asm import *
+
 # expose "microarchitecture" (instructions semantics)
-uarch = dict(filter(lambda kv:kv[0].startswith('i_'),locals().items()))
+uarch = dict(filter(lambda kv: kv[0].startswith("i_"), locals().items()))
 
 from amoco.arch.core import instruction, disassembler
 
-instruction_armv7 = type('instruction_armv7',(instruction,),{})
+instruction_armv7 = type("instruction_armv7", (instruction,), {})
 instruction_armv7.set_uarch(uarch)
 
 # define disassembler:
 from amoco.arch.arm.v7 import spec_armv7
 from amoco.arch.arm.v7 import spec_thumb
 
 from amoco.arch.arm.v7.formats import ARM_V7_full
+
 instruction_armv7.set_formatter(ARM_V7_full)
 
 
-mode   = (lambda : internals['isetstate'])
-endian = (lambda : 1 if internals['ibigend']==0 else -1)
+mode = lambda: internals["isetstate"]
+endian = lambda: 1 if internals["ibigend"] == 0 else -1
+
+disassemble = disassembler([spec_armv7, spec_thumb], instruction_armv7, mode, endian)
 
-disassemble = disassembler([spec_armv7,spec_thumb],instruction_armv7,mode,endian)
 
 def PC():
     return pc_
 
+
 def get_data_endian():
-    return 1 if internals['endianstate']==0 else -1
+    return 1 if internals["endianstate"] == 0 else -1

amoco/arch/arm/cpu_armv8.py

@@ -5,11 +5,13 @@
 # published under GPLv2 license
 
 from amoco.arch.arm.v8.asm64 import *
+
 # expose "microarchitecture" (instructions semantics)
-uarch = dict(filter(lambda kv:kv[0].startswith('i_'),locals().items()))
+uarch = dict(filter(lambda kv: kv[0].startswith("i_"), locals().items()))
 
 from amoco.arch.core import instruction, disassembler
-instruction_armv8 = type('instruction_armv8',(instruction,),{})
+
+instruction_armv8 = type("instruction_armv8", (instruction,), {})
 instruction_armv8.set_uarch(uarch)
 
 # define disassembler:
@@ -18,12 +20,14 @@
 
 instruction_armv8.set_formatter(ARM_V8_full)
 
-endian = (lambda : 1 if internals['ibigend']==0 else -1)
+endian = lambda: 1 if internals["ibigend"] == 0 else -1
+
+disassemble = disassembler([spec_armv8], endian=endian, iclass=instruction_armv8)
 
-disassemble = disassembler([spec_armv8],endian=endian,iclass=instruction_armv8)
 
 def PC():
     return pc
 
+
 def get_data_endian():
-    return 1 if internals['endianstate']==0 else -1
+    return 1 if internals["endianstate"] == 0 else -1