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fix errors during updating
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aarkegz committed Dec 5, 2024
1 parent 2a1dc35 commit 8d221f0
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Showing 9 changed files with 28 additions and 42 deletions.
10 changes: 5 additions & 5 deletions api/arceos_posix_api/src/imp/fd_ops.rs
Original file line number Diff line number Diff line change
Expand Up @@ -24,9 +24,9 @@ pub trait FileLike: Send + Sync {
lazy_static::lazy_static! {
static ref FD_TABLE: RwLock<FlattenObjects<Arc<dyn FileLike>, AX_FILE_LIMIT>> = {
let mut fd_table = FlattenObjects::new();
fd_table.add_at(0, Arc::new(stdin()) as _).unwrap(); // stdin
fd_table.add_at(1, Arc::new(stdout()) as _).unwrap(); // stdout
fd_table.add_at(2, Arc::new(stdout()) as _).unwrap(); // stderr
fd_table.add_at(0, Arc::new(stdin()) as _).unwrap_or_else(|_| panic!()); // stdin
fd_table.add_at(1, Arc::new(stdout()) as _).unwrap_or_else(|_| panic!()); // stdout
fd_table.add_at(2, Arc::new(stdout()) as _).unwrap_or_else(|_| panic!()); // stderr
RwLock::new(fd_table)
};
}
Expand All @@ -40,7 +40,7 @@ pub fn get_file_like(fd: c_int) -> LinuxResult<Arc<dyn FileLike>> {
}

pub fn add_file_like(f: Arc<dyn FileLike>) -> LinuxResult<c_int> {
Ok(FD_TABLE.write().add(f).ok_or(LinuxError::EMFILE)? as c_int)
Ok(FD_TABLE.write().add(f).map_err(|_| LinuxError::EMFILE)? as c_int)
}

pub fn close_file_like(fd: c_int) -> LinuxResult {
Expand Down Expand Up @@ -95,7 +95,7 @@ pub fn sys_dup2(old_fd: c_int, new_fd: c_int) -> c_int {
FD_TABLE
.write()
.add_at(new_fd as usize, f)
.ok_or(LinuxError::EMFILE)?;
.map_err(|_| LinuxError::EMFILE)?;

Ok(new_fd)
})
Expand Down
2 changes: 1 addition & 1 deletion doc/build.md
Original file line number Diff line number Diff line change
Expand Up @@ -50,7 +50,7 @@ What happens when "make A=apps/net/httpserver ARCH=aarch64 LOG=info NET=y SMP=1
// PC = 0x8020_0000
// a0 = hartid
// a1 = dtb
core::arch::asm!("
core::arch::naked_asm!("
mv s0, a0 // save hartid
mv s1, a1 // save DTB pointer
la sp, {boot_stack}
Expand Down
8 changes: 3 additions & 5 deletions modules/axhal/src/arch/aarch64/context.rs
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
use core::arch::asm;
use core::arch::naked_asm;
use memory_addr::VirtAddr;

/// Saved registers when a trap (exception) occurs.
Expand Down Expand Up @@ -94,7 +94,7 @@ impl TaskContext {

#[naked]
unsafe extern "C" fn context_switch(_current_task: &mut TaskContext, _next_task: &TaskContext) {
asm!(
naked_asm!(
"
// save old context (callee-saved registers)
stp x29, x30, [x0, 12 * 8]
Expand All @@ -119,14 +119,13 @@ unsafe extern "C" fn context_switch(_current_task: &mut TaskContext, _next_task:
ldp x29, x30, [x1, 12 * 8]
ret",
options(noreturn),
)
}

#[naked]
#[cfg(feature = "fp_simd")]
unsafe extern "C" fn fpstate_switch(_current_fpstate: &mut FpState, _next_fpstate: &FpState) {
asm!(
naked_asm!(
"
// save fp/neon context
mrs x9, fpcr
Expand Down Expand Up @@ -174,6 +173,5 @@ unsafe extern "C" fn fpstate_switch(_current_fpstate: &mut FpState, _next_fpstat
isb
ret",
options(noreturn),
)
}
3 changes: 1 addition & 2 deletions modules/axhal/src/arch/riscv/context.rs
Original file line number Diff line number Diff line change
Expand Up @@ -122,7 +122,7 @@ impl TaskContext {

#[naked]
unsafe extern "C" fn context_switch(_current_task: &mut TaskContext, _next_task: &TaskContext) {
asm!(
naked_asm!(
"
// save old context (callee-saved registers)
STR ra, a0, 0
Expand Down Expand Up @@ -157,6 +157,5 @@ unsafe extern "C" fn context_switch(_current_task: &mut TaskContext, _next_task:
LDR ra, a1, 0
ret",
options(noreturn),
)
}
4 changes: 2 additions & 2 deletions modules/axhal/src/platform/aarch64_common/boot.rs
Original file line number Diff line number Diff line change
Expand Up @@ -107,7 +107,7 @@ unsafe fn init_boot_page_table() {
unsafe extern "C" fn _start() -> ! {
// PC = 0x8_0000
// X0 = dtb
core::arch::asm!("
core::arch::naked_asm!("
mrs x19, mpidr_el1
and x19, x19, #0xffffff // get current CPU id
mov x20, x0 // save DTB pointer
Expand Down Expand Up @@ -147,7 +147,7 @@ unsafe extern "C" fn _start() -> ! {
#[no_mangle]
#[link_section = ".text.boot"]
unsafe extern "C" fn _start_secondary() -> ! {
core::arch::asm!("
core::arch::naked_asm!("
mrs x19, mpidr_el1
and x19, x19, #0xffffff // get current CPU id
Expand Down
2 changes: 1 addition & 1 deletion modules/axhal/src/platform/aarch64_raspi/mp.rs
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@ extern "C" {
#[naked]
#[link_section = ".text.boot"]
unsafe extern "C" fn modify_stack_and_start() {
core::arch::asm!("
core::arch::naked_asm!("
ldr x21, ={secondary_boot_stack} // the secondary CPU hasn't set the TTBR1
mov x8, {phys_virt_offset} // minus the offset to get the phys addr of the boot stack
sub x21, x21, x8
Expand Down
4 changes: 2 additions & 2 deletions modules/axhal/src/platform/riscv64_qemu_virt/boot.rs
Original file line number Diff line number Diff line change
Expand Up @@ -33,7 +33,7 @@ unsafe extern "C" fn _start() -> ! {
// PC = 0x8020_0000
// a0 = hartid
// a1 = dtb
core::arch::asm!("
core::arch::naked_asm!("
mv s0, a0 // save hartid
mv s1, a1 // save DTB pointer
la sp, {boot_stack}
Expand Down Expand Up @@ -70,7 +70,7 @@ unsafe extern "C" fn _start() -> ! {
unsafe extern "C" fn _start_secondary() -> ! {
// a0 = hartid
// a1 = SP
core::arch::asm!("
core::arch::naked_asm!("
mv s0, a0 // save hartid
mv sp, a1 // set SP
Expand Down
1 change: 0 additions & 1 deletion modules/axnet/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -18,7 +18,6 @@
//! [smoltcp]: https://github.com/smoltcp-rs/smoltcp
#![no_std]
#![feature(new_uninit)]

#[macro_use]
extern crate log;
Expand Down
36 changes: 13 additions & 23 deletions ulib/axlibc/src/setjmp.rs
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ use crate::ctypes;
#[no_mangle]
pub unsafe extern "C" fn setjmp(_buf: *mut ctypes::__jmp_buf_tag) {
#[cfg(all(target_arch = "aarch64", feature = "fp_simd"))]
core::arch::asm!(
core::arch::naked_asm!(
"
stp x19, x20, [x0,#0]
stp x21, x22, [x0,#16]
Expand All @@ -23,10 +23,9 @@ pub unsafe extern "C" fn setjmp(_buf: *mut ctypes::__jmp_buf_tag) {
stp d14, d15, [x0,#160]
mov x0, #0
ret",
options(noreturn),
);
#[cfg(all(target_arch = "aarch64", not(feature = "fp_simd")))]
core::arch::asm!(
core::arch::naked_asm!(
"
stp x19, x20, [x0,#0]
stp x21, x22, [x0,#16]
Expand All @@ -38,10 +37,9 @@ pub unsafe extern "C" fn setjmp(_buf: *mut ctypes::__jmp_buf_tag) {
str x2, [x0,#104]
mov x0, #0
ret",
options(noreturn),
);
#[cfg(target_arch = "x86_64")]
core::arch::asm!(
core::arch::naked_asm!(
"mov [rdi], rbx
mov [rdi + 8], rbp
mov [rdi + 16], r12
Expand All @@ -54,10 +52,9 @@ pub unsafe extern "C" fn setjmp(_buf: *mut ctypes::__jmp_buf_tag) {
mov [rdi + 56], rdx
xor rax, rax
ret",
options(noreturn),
);
#[cfg(all(target_arch = "riscv64", feature = "fp_simd"))]
core::arch::asm!(
core::arch::naked_asm!(
"sd s0, 0(a0)
sd s1, 8(a0)
sd s2, 16(a0)
Expand Down Expand Up @@ -88,10 +85,9 @@ pub unsafe extern "C" fn setjmp(_buf: *mut ctypes::__jmp_buf_tag) {
li a0, 0
ret",
options(noreturn),
);
#[cfg(all(target_arch = "riscv64", not(feature = "fp_simd")))]
core::arch::asm!(
core::arch::naked_asm!(
"sd s0, 0(a0)
sd s1, 8(a0)
sd s2, 16(a0)
Expand All @@ -109,22 +105,21 @@ pub unsafe extern "C" fn setjmp(_buf: *mut ctypes::__jmp_buf_tag) {
li a0, 0
ret",
options(noreturn),
);
#[cfg(not(any(
target_arch = "aarch64",
target_arch = "x86_64",
target_arch = "riscv64"
)))]
core::arch::asm!("ret", options(noreturn))
core::arch::naked_asm!("ret")
}

/// `longjmp` implementation
#[naked]
#[no_mangle]
pub unsafe extern "C" fn longjmp(_buf: *mut ctypes::__jmp_buf_tag, _val: c_int) -> ! {
#[cfg(all(target_arch = "aarch64", feature = "fp_simd"))]
core::arch::asm!(
core::arch::naked_asm!(
"ldp x19, x20, [x0,#0]
ldp x21, x22, [x0,#16]
ldp x23, x24, [x0,#32]
Expand All @@ -141,10 +136,9 @@ pub unsafe extern "C" fn longjmp(_buf: *mut ctypes::__jmp_buf_tag, _val: c_int)
cmp w1, 0
csinc w0, w1, wzr, ne
br x30",
options(noreturn),
);
#[cfg(all(target_arch = "aarch64", not(feature = "fp_simd")))]
core::arch::asm!(
core::arch::naked_asm!(
"ldp x19, x20, [x0,#0]
ldp x21, x22, [x0,#16]
ldp x23, x24, [x0,#32]
Expand All @@ -157,15 +151,14 @@ pub unsafe extern "C" fn longjmp(_buf: *mut ctypes::__jmp_buf_tag, _val: c_int)
cmp w1, 0
csinc w0, w1, wzr, ne
br x30",
options(noreturn),
);
#[cfg(target_arch = "x86_64")]
core::arch::asm!(
core::arch::naked_asm!(
"mov rax,rsi
test rax,rax
jnz 1f
jnz 2f
inc rax
1:
2:
mov rbx, [rdi]
mov rbp, [rdi + 8]
mov r12, [rdi + 16]
Expand All @@ -176,10 +169,9 @@ pub unsafe extern "C" fn longjmp(_buf: *mut ctypes::__jmp_buf_tag, _val: c_int)
mov rsp, rdx
mov rdx, [rdi + 56]
jmp rdx",
options(noreturn),
);
#[cfg(all(target_arch = "riscv64", feature = "fp_simd"))]
core::arch::asm!(
core::arch::naked_asm!(
"ld s0, 0(a0)
ld s1, 8(a0)
ld s2, 16(a0)
Expand Down Expand Up @@ -211,10 +203,9 @@ pub unsafe extern "C" fn longjmp(_buf: *mut ctypes::__jmp_buf_tag, _val: c_int)
seqz a0, a1
add a0, a0, a1
ret",
options(noreturn),
);
#[cfg(all(target_arch = "riscv64", not(feature = "fp_simd")))]
core::arch::asm!(
core::arch::naked_asm!(
"ld s0, 0(a0)
ld s1, 8(a0)
ld s2, 16(a0)
Expand All @@ -233,6 +224,5 @@ pub unsafe extern "C" fn longjmp(_buf: *mut ctypes::__jmp_buf_tag, _val: c_int)
seqz a0, a1
add a0, a0, a1
ret",
options(noreturn),
);
}

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