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arch/risc-v: Refactor LLVM CPU type handling in Toolchain.cmake #15475

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Jan 9, 2025
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22 changes: 10 additions & 12 deletions arch/risc-v/src/cmake/Toolchain.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -343,21 +343,19 @@ if(CONFIG_RISCV_TOOLCHAIN STREQUAL GNU_RVG)
# These models can't cover all implementation of RISCV, but it's enough for
# most cases.

set(LLVM_CPUFLAGS)

if(CONFIG_ARCH_RV32)
if(${ARCHCPUEXTFLAGS} STREQUAL imc)
list(APPEND LLVM_CPUFLAGS -mcpu=sifive-e20)
elseif(${ARCHCPUEXTFLAGS} STREQUAL imac)
list(APPEND LLVM_CPUFLAGS -mcpu=sifive-e31)
elseif(${ARCHCPUEXTFLAGS} STREQUAL imafc)
list(APPEND LLVM_CPUFLAGS -mcpu=sifive-e76)
if(${ARCHCPUEXTFLAGS} MATCHES "^imc")
set(LLVM_CPUTYPE "sifive-e20")
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but why use a specific vendor chip sifive-e20? @no1wudi

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@no1wudi no1wudi Jan 10, 2025

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For the RISC-V platform, the CPU_TYPE here is typically not utilized (pass to compiler); it is merely used to denote a combination of ISAs. For instance, sifive-e20 represents IMC. This is because LLVM's ARCH_TYPE only specifies RISCV32/RISCV64 and does not reflect the specific ISA. In practical application scenarios, such as in the Rust compiler, sifive-e20 is decoded as riscv32imc and then passed to the Rust compiler.

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but why not pass the general riscv32imc directly?

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@no1wudi no1wudi Jan 10, 2025

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Because you can still pass it to compiler as -mcpu param in some case, it can works although it may not be the optimal choice, it will not cause any issues. But riscv32imc can not, it's not a valid identifier in LLVM backend:

nuttx/tools/Zig.defs

Lines 42 to 46 in 724797e

# Convert cortex-xxx/sifive-exx to cortex_xxx/sifive_exx
ifneq ($(LLVM_CPUTYPE),)
ZIGFLAGS += -mcpu $(subst -,_,$(LLVM_CPUTYPE))
endif

For MCUs, symbols like sifive-e20 are merely used to indicate the ISA types supported by the RISC-V platform and do not entail any substantive optimizations for the CPU core itself.

For example, certain compilers using LLVM, such as wamrc, typically employ --cpu=generic-rv32 in conjunction with the --cpu-features parameter +m,+c to enable support for riscv32imc. In practice, however, this is equivalent to specifying --cpu=sifive-e20.

elseif(${ARCHCPUEXTFLAGS} MATCHES "^imac")
set(LLVM_CPUTYPE "sifive-e31")
elseif(${ARCHCPUEXTFLAGS} MATCHES "^imafc")
set(LLVM_CPUTYPE "sifive-e76")
endif()
else()
if(${ARCHCPUEXTFLAGS} STREQUAL imac)
list(APPEND LLVM_CPUFLAGS -mcpu=sifive-s51)
elseif(${ARCHCPUEXTFLAGS} STREQUAL imafdc)
list(APPEND LLVM_CPUFLAGS -mcpu=sifive-u54)
if(${ARCHCPUEXTFLAGS} MATCHES "^imac")
set(LLVM_CPUTYPE "sifive-s51")
elseif(${ARCHCPUEXTFLAGS} MATCHES "^imafdc")
set(LLVM_CPUTYPE "sifive-u54")
endif()
endif()

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