openroad, config: various fixes

TheMightyDuckOfDoom · May 28, 2024 · 5813db6 · 5813db6
1 parent 5366cfa
commit 5813db6
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Showing 7 changed files with 38 additions and 23 deletions.
diff --git a/config/footprints.json b/config/footprints.json
@@ -108,7 +108,7 @@
             "names": ["trimmer_3pin_2_54mm"],
             "single_row": true,
             "through_hole": true,
-            "num_pins": 3,
+            "num_pins": 5,
             "hole_diameter": 1.0,
             "pad_height": 1.7,
             "pad_width": 1.7,

diff --git a/config/libraries/Analog.json b/config/libraries/Analog.json
@@ -118,19 +118,19 @@
             "power": [
                 {
                     "name": "VDD",
-                    "pin_number": 1,
+                    "pin_number": 2,
                     "function": "power"
                 },
                 {
                     "name": "GND",
-                    "pin_number": 3,
+                    "pin_number": 4,
                     "function": "ground"
                 }
             ],
             "outputs": [
                 {
                     "name": "Y",
-                    "pin_number": 2,
+                    "pin_number": 3,
                     "function": "1"
                 }
             ]
@@ -215,7 +215,7 @@
                     "bus_name": "Y",
                     "bus_type": "Y_7_0",
                     "bus_pins": [1, 2, 3, 4, 5, 6, 7, 8],
-                    "verilog_function": "8'Z",
+                    "verilog_function": "'Z",
                     "function": ""
                 }
             ]

diff --git a/config/technology.json b/config/technology.json
@@ -9,7 +9,9 @@
         "metal_layers": 2,
         "y_wire_pitch": 0.26,
         "x_wire_pitch": 0.325,
+        "wire_thickness": 0.035,
         "wire_width": 0.13,
+        "sheet_resistance": 0.0005,
         "wire_spacing": 0.13,
         "via_diameter": 0.3,
         "via_annular_ring": 0.13,

diff --git a/openroad/chip.tcl b/openroad/chip.tcl
@@ -32,7 +32,7 @@ if {$routing_channels} {
         }
     } else {
         if {$endcap} {
-            set density 0.55
+            set density 0.57
         } else {
             set density 0.78
         }
@@ -106,7 +106,7 @@ add_global_connection -net GND -inst_pattern .* -pin_pattern NC
 global_connect
 
 set_voltage_domain -name CORE -power VDD -ground GND
-define_pdn_grid -name grid -voltage_domains CORE
+define_pdn_grid -name grid -voltage_domains CORE -obstructions {Metal1 Metal2}
 
 add_pdn_ring -grid {grid} \
     -layer {Metal1 Metal2} \
@@ -131,14 +131,7 @@ add_pdn_connect -layers {Metal1 Metal2} -fixed_vias {Via1_Power} -max_rows 1 \
 pdngen
 
 if {$routing_channels} {
-    set rows [odb::dbBlock_getRows [ord::get_db_block]]
-    set index 0
-    foreach row $rows {
-        if {$index} {
-            odb::dbRow_destroy $row
-        }
-        set index [expr {!$index}]
-    }
+    create_routing_channels
 }
 
 set die_area [ord::get_die_area]
@@ -289,15 +282,15 @@ placeDetail
 check_placement -verbose
 
 set_routing_layers -signal Metal1-Metal2 -clock Metal1-Metal2
-global_route -verbose -allow_congestion
+global_route -verbose -allow_congestion -critical_nets_percentage 0
 
 repair_design
 repair_timing
 
 placeDetail
 check_placement -verbose
 
-global_route -verbose -allow_congestion
+global_route -verbose -allow_congestion -critical_nets_percentage 0
 
 set track_reduction 3
 for {set i 0} {$i < $track_reduction} {incr i} {

diff --git a/openroad/merge_cell.tcl b/openroad/merge_cell.tcl
@@ -97,7 +97,7 @@ report_checks -path_delay max -corner Typical
 
 # Global route
 set_routing_layers -signal Metal1-Metal2 -clock Metal1-Metal2
-global_route -verbose -allow_congestion
+global_route -verbose -allow_congestion -critical_nets_percentage 0
 
 # Detailed route
 detailed_route -output_drc merge_macros_route_drc.rpt

diff --git a/openroad/util.tcl b/openroad/util.tcl
@@ -84,7 +84,8 @@ proc connect_scan_chain {} {
             }
         }
 
-        puts "Closest scan flip-flop $closest_i at ([lindex $x_pos $closest_i] \
+        puts "Closest scan flip-flop $closest_i: [odb::dbInst_getName \
+            [lindex $scan_ffs $closest_i]] at ([lindex $x_pos $closest_i] \
             [lindex $y_pos $closest_i])"
 
         # Add to scan chain
@@ -107,7 +108,7 @@ proc connect_scan_chain {} {
     }
 
     # Connect scan chain input
-    odb::dbITerm_connect [odb::dbInst_findITerm [lindex $scan_chain 0  ] \
+    odb::dbITerm_connect [odb::dbInst_findITerm [lindex $scan_chain 0] \
         "scan_d_i"] $d_i_net
 
     # Connect scan chain output
@@ -116,9 +117,25 @@ proc connect_scan_chain {} {
 
     # Connect scan chain FFs
     for {set i 0} {$i < [llength $scan_chain] - 1} {incr i} {
-        odb::dbITerm_connect [odb::dbInst_findITerm [lindex $scan_chain $i] \
-            "scan_d_i"] [odb::dbITerm_getNet [odb::dbInst_findITerm [lindex \
-            $scan_chain [expr {$i + 1}]] "q_o"]]
+        puts "Connecting [odb::dbInst_getName [lindex $scan_chain $i]] to \
+            [odb::dbInst_getName [lindex $scan_chain [expr {$i + 1}]]]"
+        set dst_iterm [odb::dbInst_findITerm [lindex $scan_chain \
+            [expr {$i + 1}]] "scan_d_i"]
+        set src_iterm [odb::dbInst_findITerm [lindex $scan_chain $i] "q_o"]
+        set src_net [odb::dbITerm_getNet $src_iterm]
+        odb::dbITerm_connect $dst_iterm $src_net
+    }
+}
+
+# Remove every second row to create routing channels
+proc create_routing_channels {} {
+    set rows [odb::dbBlock_getRows [ord::get_db_block]]
+    set index 0
+    foreach row $rows {
+        if {$index} {
+            odb::dbRow_destroy $row
+        }
+        set index [expr {!$index}]
     }
 }
 

diff --git a/templates/tech_lef.template b/templates/tech_lef.template
@@ -30,7 +30,10 @@ LAYER Metal${i}
   PITCH ${technology["x_wire_pitch"]} ;
   % endif
   WIDTH ${technology["wire_width"]} ;
+  # MINWIDTH ${technology["wire_width"]} ;
   SPACING ${technology["wire_spacing"]} ;
+  # THICKNESS ${technology["wire_thickness"]} ;
+  # RESISTANCE RPERSQ ${technology["sheet_resistance"]} ;
 end Metal${i}
 
   % if i < technology["metal_layers"]: