Litex soc now use explicit async read ram blackbox

src/main/scala/naxriscv/platform/Litex.scala

@@ -351,6 +351,45 @@ vexii:timed 5026 gametics in 259 realtics (679.189209 fps)  (-1 no sb, 2i, 128KB
 
 
 
+in debian =>
+usr/games/chocolate-doom -1 -nosound -timedemo demo1.lmp
+nax =>      timed 5026 gametics in 6220 realtics (28.281351 fps)
+vexii 1i => timed 5026 gametics in 8986 realtics (19.576008 fps)
+vexii 2i => timed 5026 gametics in 8092 realtics (21.738754 fps)
+
+
+
+/usr/games/chocolate-doom -1 -nosound -timedemo demo1.lmp  -noblit
+nax =>      timed 5026 gametics in 1951 realtics (90.164017 fps)
+vexii 1i => timed 5026 gametics in 2919 realtics (60.263790 fps)
+vexii 2i => timed 5026 gametics in 2652 realtics (66.331070 fps)
+
+https://download.blender.org/peach/bigbuckbunny_movies/  -vf scale=640:360 -sws 4
+time mplayer -lavdopts threads=4  /home/miaou/readonly/video/BigBuckBunny_320x180.mp4
+time mplayer -vo fbdev -lavdopts threads=1 /home/miaou/readonly/video/file_example_MP4_480_1_5MG.mp4
+2c
+1c
+
+vexii
+real	1m42.729s 67
+user	2m15.184s
+sys	0m3.116s
+
+real	2m8.090s 93
+user	2m5.600s
+sys	0m2.101s
+
+
+nax
+real	1m7.359s
+user	1m27.720s
+sys	0m2.908s
+
+real	1m21.211s
+user	1m18.886s
+sys	0m2.099s
+
+
 root@buildroot:~# ramspeed -b 1 -g  1
 RAMspeed (GENERIC) v2.6.0 by Rhett M. Hollander and Paul V. Bolotoff, 2002-09
 
@@ -626,4 +665,30 @@ enable root ssh
 disable x11 GLX extention
 enable HVC0
 
+
+
+BLUETOOTH !
+
+bluealsa -p a2dp-source -p a2dp-sink --a2dp-force-audio-cd
+bluetoothctl
+connect 88:C9:E8:E6:2A:69
+pulseaudio --start
+systemctl status bluetooth
+speaker-test -t wav -c 6
+speaker-test -t wav -c 6 -D btheadset
+pacmd list-sinks
+aplay -D bluealsa piano2.wave
+
+https://agl-gsod-2020-demo-mkdocs.readthedocs.io/en/latest/icefish/apis_services/reference/audio/audio/bluez-alsa/
+
+
+systemctl restart bluetooth
+
+pulseaudio-module-bluetooth
+
+mpg123 -a btheadset mp3/01-long_distance_calling-metulsky_curse_revisited.mp3
+
+
+
+--sbc-quality=low 
  */

src/main/scala/naxriscv/platform/litex/NaxGen.scala

@@ -9,6 +9,7 @@ import naxriscv.execute.CsrTracer
 import naxriscv.misc.PrivilegedPlugin
 import naxriscv.utilities._
 import spinal.core._
+import spinal.core.internals.MemTopology
 import spinal.lib.bus.misc.SizeMapping
 
 import scala.collection.mutable.ArrayBuffer
@@ -40,6 +41,16 @@ case class LitexMemoryRegion(mapping : SizeMapping, mode : String, bus : String)
 //python3 -m litex_boards.targets.digilent_nexys_video --cpu-type=naxriscv  --bus-standard axi-lite --with-video-framebuffer --with-coherent-dma --with-sdcard --with-ethernet --xlen=64 --scala-args='rvc=true,rvf=true,rvd=true,alu-count=2,decode-count=2'  --with-jtag-tap --sys-clk-freq 100000000 --cpu-count 2 --soc-json build/digilent_nexys_video/csr.json --update-repo no --load
 //litex_sim --cpu-type=naxriscv  --with-sdram --sdram-data-width=64 --bus-standard axi-lite  --scala-args='rvc=true,rvf=true,rvd=true,alu-count=1,decode-count=1' --with-coherent-dma --xlen=64 --trace-fst --sdram-init boot.json  --update-repo no
 
+object blackboxPolicy extends MemBlackboxingPolicy{
+  override def translationInterest(topology: MemTopology): Boolean = {
+    if(topology.writes.exists(_.mask != null) && topology.mem.initialContent == null) return true
+    if (topology.readWriteSync.exists(_.mask != null) && topology.mem.initialContent == null) return true
+    if (topology.readsAsync.size != 0 && topology.mem.initialContent == null) return true
+    false
+  }
+
+  override def onUnblackboxable(topology: MemTopology, who: Any, message: String): Unit = generateUnblackboxableError(topology, who, message)
+}
 
 object NaxGen extends App{
   var netlistDirectory = "."
@@ -83,7 +94,7 @@ object NaxGen extends App{
   val spinalConfig = SpinalConfig(inlineRom = true, targetDirectory = netlistDirectory)
   spinalConfig.addTransformationPhase(new MemReadDuringWritePatcherPhase)
   spinalConfig.addTransformationPhase(new MultiPortWritesSymplifier)
-  spinalConfig.addStandardMemBlackboxing(blackboxByteEnables)
+  spinalConfig.addStandardMemBlackboxing(blackboxPolicy)
   spinalConfig.addTransformationPhase(new EnforceSyncRamPhase)
   spinalConfig.includeSimulation