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RED-V_SiFive_RISC-V_FE310_SoC

Merge pull request #23 from Embedded-System-Lovers/update_docs_and_ci #65

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Merge pull request #23 from Embedded-System-Lovers/update_docs_and_ci

Merge pull request #23 from Embedded-System-Lovers/update_docs_and_ci #65

Triggered via push May 30, 2024 08:42
@ckormanyosckormanyos
pushed 23eb8b4
master
Status Success
Total duration 1m 37s
Artifacts –

RED-V_SiFive_RISC-V_FE310_SoC.yml

on: push
target-gcc-riscv32-unknown-elf
1m 13s
target-gcc-riscv32-unknown-elf
target-gcc-riscv32-unknown-elf-cmake
1m 26s
target-gcc-riscv32-unknown-elf-cmake
target-gcc-riscv32-unknown-elf-macos
1m 11s
target-gcc-riscv32-unknown-elf-macos
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