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Merge pull request #1 from AUDIY/Chang_Copyright_Notice_to_2025
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Chang copyright notice to 2025
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@AUDIY
AUDIY authored Jan 3, 2025
2 parents 0da4642 + 24365aa commit c7b1024
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2 changes: 1 addition & 1 deletion 01_DPRAM_CONT/DPRAM_CONT.v
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*
* License
--------------------------------------------------------------------------------
| Copyright AUDIY 2023. |
| Copyright AUDIY 2023 - 2025. |
| |
| This source describes Open Hardware and is licensed under the CERN-OHL-W v2. |
| |
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2 changes: 1 addition & 1 deletion 01_DPRAM_CONT/DPRAM_CONT_TB.v
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*
* License
--------------------------------------------------------------------------------
| Copyright AUDIY 2023. |
| Copyright AUDIY 2023 - 2025. |
| |
| This source describes Open Hardware and is licensed under the CERN-OHL-W v2. |
| |
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2 changes: 1 addition & 1 deletion 02_DATA_BUFFER/DATA_BUFFER.v
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*
* License
--------------------------------------------------------------------------------
| Copyright AUDIY 2023. |
| Copyright AUDIY 2023 - 2025. |
| |
| This source describes Open Hardware and is licensed under the CERN-OHL-W v2. |
| |
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2 changes: 1 addition & 1 deletion 02_DATA_BUFFER/DATA_BUFFER_TB.v
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*
* License
--------------------------------------------------------------------------------
| Copyright AUDIY 2023. |
| Copyright AUDIY 2023 - 2025. |
| |
| This source describes Open Hardware and is licensed under the CERN-OHL-W v2. |
| |
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4 changes: 2 additions & 2 deletions 02_DATA_BUFFER/SDPRAM_SINGLECLK.v
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*
* License under CERN-OHL-P v2
--------------------------------------------------------------------------------
| Copyright AUDIY 2023. |
| Copyright AUDIY 2023 - 2025. |
| |
| This source describes Open Hardware and is licensed under the CERN-OHL-P v2. |
| |
Expand Down Expand Up @@ -106,4 +106,4 @@ module SDPRAM_SINGLECLK #(
// Assertion #1: When both of WENABLE_I and RENABLE_I returns 1'b1, RADDR_I and WADDR_I must be different.
// psl assert always ((WENABLE_I & RENABLE_I == 1'b1) -> (WADDR_I != RADDR_I)) @(posedge CLK_I);

endmodule
endmodule
2 changes: 1 addition & 1 deletion 03_SPROM_CONT/SPROM_CONT.v
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*
* License
--------------------------------------------------------------------------------
| Copyright AUDIY 2023. |
| Copyright AUDIY 2023 - 2025. |
| |
| This source describes Open Hardware and is licensed under the CERN-OHL-W v2. |
| |
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2 changes: 1 addition & 1 deletion 03_SPROM_CONT/SPROM_CONT_TB.v
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*
* License
--------------------------------------------------------------------------------
| Copyright AUDIY 2023. |
| Copyright AUDIY 2023 - 2025. |
| |
| This source describes Open Hardware and is licensed under the CERN-OHL-W v2. |
| |
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2 changes: 1 addition & 1 deletion 04_FIR_COEF/FIR_COEF.v
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*
* License
--------------------------------------------------------------------------------
| Copyright AUDIY 2023. |
| Copyright AUDIY 2023 - 2025. |
| |
| This source describes Open Hardware and is licensed under the CERN-OHL-W v2. |
| |
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2 changes: 1 addition & 1 deletion 04_FIR_COEF/FIR_COEF_TB.v
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*
* License
--------------------------------------------------------------------------------
| Copyright AUDIY 2023. |
| Copyright AUDIY 2023 - 2025. |
| |
| This source describes Open Hardware and is licensed under the CERN-OHL-W v2. |
| |
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4 changes: 2 additions & 2 deletions 04_FIR_COEF/SPROM.v
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*
* License under CERN-OHL-P v2
--------------------------------------------------------------------------------
| Copyright AUDIY 2023. |
| Copyright AUDIY 2023 - 2025. |
| |
| This source describes Open Hardware and is licensed under the CERN-OHL-P v2. |
| |
Expand Down Expand Up @@ -80,4 +80,4 @@ module SPROM #(
end
endgenerate

endmodule
endmodule
2 changes: 1 addition & 1 deletion 05_MULT/MULT.v
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*
* License
--------------------------------------------------------------------------------
| Copyright AUDIY 2023. |
| Copyright AUDIY 2023 - 2025. |
| |
| This source describes Open Hardware and is licensed under the CERN-OHL-W v2. |
| |
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2 changes: 1 addition & 1 deletion 05_MULT/MULT_TB.v
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*
* License
--------------------------------------------------------------------------------
| Copyright AUDIY 2023. |
| Copyright AUDIY 2023 - 2025. |
| |
| This source describes Open Hardware and is licensed under the CERN-OHL-W v2. |
| |
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2 changes: 1 addition & 1 deletion 06_ADD/ADD.v
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*
* License
--------------------------------------------------------------------------------
| Copyright AUDIY 2023. |
| Copyright AUDIY 2023 - 2025. |
| |
| This source describes Open Hardware and is licensed under the CERN-OHL-W v2. |
| |
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2 changes: 1 addition & 1 deletion 06_ADD/ADD_TB.v
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*
* License
--------------------------------------------------------------------------------
| Copyright AUDIY 2023. |
| Copyright AUDIY 2023 - 2025. |
| |
| This source describes Open Hardware and is licensed under the CERN-OHL-W v2. |
| |
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2 changes: 1 addition & 1 deletion 07_FIR_x2/FIR_x2.v
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*
* License
--------------------------------------------------------------------------------
| Copyright AUDIY 2023. |
| Copyright AUDIY 2023 - 2025. |
| |
| This source describes Open Hardware and is licensed under the CERN-OHL-W v2. |
| |
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2 changes: 1 addition & 1 deletion 07_FIR_x2/FIR_x2_TB.v
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*
* License
--------------------------------------------------------------------------------
| Copyright AUDIY 2023. |
| Copyright AUDIY 2023 - 2025. |
| |
| This source describes Open Hardware and is licensed under the CERN-OHL-W v2. |
| |
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2 changes: 1 addition & 1 deletion README.md
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Expand Up @@ -37,7 +37,7 @@ https://audio-diy.hatenablog.com/entry/FIR_x2_howtouse
4. Oversample_x2_Tang_Primer_20K.gar for Tang Primer 20K & Gowin EDA v1.9.8.11 Education ( https://github.com/AUDIY/FIR_x2/tree/main/10_Example/04_Tang_Primer_20K )

## License
Copyright AUDIY 2023.
Copyright AUDIY 2023 - 2025.

This source describes Open Hardware and is licensed under the CERN-OHL-W v2

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