Mechanisms for testing?

[simon-frankau]

Compared to e.g. WinCUPL, galette lacks the ability to test GAL designs.

I'm not sure what the right approach is here - whether it's to support the evaluation of test vectors directly, or whether it should generate some kind of design that can be fed into someone else's simulation framework (useful for simulating the wider circuit as a whole, I guess).

If the latter, which format should be used? I could see creating a Verilog module, say, but is that too heavyweight for the kind of use that GALs are put to?