Releases: riscv/riscv-isa-manual
Release riscv-isa-release-0ee55c0-2024-10-12
This release was created by: aswaterman
Release of RISC-V ISA, built from commit 0ee55c0, is now available.
What's Changed
- Add LCOFI priority info for HS-mode (#1678) by @demin-han in #1679
Full Changelog: riscv-isa-release-b22b28e-2024-10-10...riscv-isa-release-0ee55c0-2024-10-12
Release riscv-isa-release-b22b28e-2024-10-10
This release was created by: aswaterman
Release of RISC-V ISA, built from commit b22b28e, is now available.
What's Changed
- Remove pseudoinstructions from B instruction table by @aswaterman in #1676
Full Changelog: riscv-isa-release-1569c8d-2024-10-03...riscv-isa-release-b22b28e-2024-10-10
Release riscv-isa-release-8912b84-2024-10-03
This release was created by: aswaterman
Release of RISC-V ISA, built from commit 8912b84, is now available.
What's Changed
- Add a non-normative comment to clarify MXR behavior for pointer masking. by @martinmaas in #1667
Full Changelog: riscv-isa-release-69ac607-2024-10-03...riscv-isa-release-8912b84-2024-10-03
Release riscv-isa-release-69ac607-2024-10-03
This release was created by: aswaterman
Release of RISC-V ISA, built from commit 69ac607, is now available.
What's Changed
- Update priv spec version for ratification vote by @aswaterman in #1666
Full Changelog: riscv-isa-release-56b6de2-2024-10-03...riscv-isa-release-69ac607-2024-10-03
Release riscv-isa-release-56b6de2-2024-10-03
This release was created by: aswaterman
Release of RISC-V ISA, built from commit 56b6de2, is now available.
What's Changed
- G-stage PTE D-bit update relaxation by @ved-rivos in #1665
Full Changelog: riscv-isa-release-4b69db2-2024-10-02...riscv-isa-release-56b6de2-2024-10-03
Release riscv-isa-release-243eb93-2024-10-03
This release was created by: aswaterman
Release of RISC-V ISA, built from commit 243eb93, is now available.
What's Changed
Full Changelog: riscv-isa-release-8912b84-2024-10-03...riscv-isa-release-243eb93-2024-10-03
Release riscv-isa-release-1569c8d-2024-10-03
This release was created by: kersten1
Release of RISC-V ISA, built from commit 1569c8d, is now available.
What's Changed
Full Changelog: riscv-isa-release-243eb93-2024-10-03...riscv-isa-release-1569c8d-2024-10-03
Release riscv-isa-release-d33f3d8-2024-10-02
This release was created by: aswaterman
Release of RISC-V ISA, built from commit d33f3d8, is now available.
What's Changed
New Contributors
Full Changelog: riscv-isa-release-0594e18-2024-10-02...riscv-isa-release-d33f3d8-2024-10-02
Release riscv-isa-release-4b69db2-2024-10-02
This release was created by: aswaterman
Release of RISC-V ISA, built from commit 4b69db2, is now available.
What's Changed
- In MAG definition, use XLEN rather than MXLEN by @aswaterman in #1664
Full Changelog: riscv-isa-release-d33f3d8-2024-10-02...riscv-isa-release-4b69db2-2024-10-02
Release riscv-isa-release-0594e18-2024-10-02
This release was created by: aswaterman
Release of RISC-V ISA, built from commit 0594e18, is now available.
What's Changed
Full Changelog: riscv-isa-release-5e3f9ab-2024-09-30...riscv-isa-release-0594e18-2024-10-02