Clarification Needed: Concerns Regarding PMP Changes Without HFENCE.VVMA Usage

[Wangrodman]

HFENCE.VVMA targets VS-stage translation, while HFENCE.GVMA targets G-stage translation.

I have concerns about the above description regarding PMP changes. PTE caching is a common practice in MMUs, meaning that PTEs accessed implicitly during VS-stage translation can be cached. If the PMP settings for the address of a cached PTE are changed, the new settings will not be visible to the cached entry.

As a result, the expected trap will not occur because the cached PTE will be used without checking the new settings.
In this case, whether a fault should occur is undefined, correct? If the software requires consistent and predictable protection, HFENCE.VVMA should be executed. This responsibility should be documented in the software guidelines by whoever provides a product that includes the PTE cache.

[aswaterman]

The spec clearly states that HFENCE.GVMA suffices and HFENCE.VVMA is not required. There is no problem here.

HFENCE.VVMA targets VS-stage translation, while HFENCE.GVMA targets G-stage translation.

This is not entirely correct. As noted above, HFENCE.GVMA suffices in this case, meaning that in certain cases it is more powerful than you presume.

[Wangrodman]

HFENCE.VVMA targets VS-stage translation, while HFENCE.GVMA targets G-stage translation.

This is not entirely correct. As noted above, HFENCE.GVMA suffices in this case, meaning that in certain cases it is more powerful than you presume.

Do you mean that implicit G-stage is also targeted by HFENCE.GVMA?
If so, it makes sense that GVMA is sufficient.

[aswaterman]

Do you mean that implicit G-stage translation is also targeted by HFENCE.GVMA?

No. I only mean to say that the spec clearly states that this particular case is covered by HFENCE.GVMA. I am not making a broader statement.

[aswaterman]

Closing this issue, since the spec is crystal clear.