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interp.c
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#include "interp.h"
#include "bbc_options.h"
#include "cpu_driver.h"
#include "debug.h"
#include "defs_6502.h"
#include "log.h"
#include "memory_access.h"
#include "state_6502.h"
#include "timing.h"
#include "util.h"
#include <assert.h>
#include <stdint.h>
enum {
k_interp_special_debug = 1,
k_interp_special_callback = 2,
k_interp_special_countdown = 4,
k_interp_special_poll_irq = 8,
k_interp_special_entry = 16,
k_interp_special_memory_written_callback = 32,
k_interp_special_KIL = 64,
};
struct interp_struct {
struct cpu_driver driver;
int is_65c12;
void (*p_memory_written_callback)(void* p);
void* p_memory_written_callback_object;
uint8_t* p_opcode_mem;
uint8_t* p_mem_read;
uint8_t* p_mem_write;
int debug_subsystem_active;
volatile int* p_debug_interrupt;
uint8_t callback_intf;
int callback_do_irq;
uint64_t counter_bcd;
};
static void
interp_destroy(struct cpu_driver* p_cpu_driver) {
assert(p_cpu_driver->p_funcs->get_flags(p_cpu_driver) & k_cpu_flag_exited);
util_free(p_cpu_driver);
}
static int
interp_enter(struct cpu_driver* p_cpu_driver) {
struct interp_struct* p_interp = (struct interp_struct*) p_cpu_driver;
int64_t countdown = timing_get_countdown(p_interp->driver.p_extra->p_timing);
countdown = interp_enter_with_details(p_interp, countdown, NULL, NULL);
(void) countdown;
return !!(p_cpu_driver->flags & k_cpu_flag_exited);
}
static char*
interp_get_address_info(struct cpu_driver* p_cpu_driver, uint16_t addr) {
(void) p_cpu_driver;
(void) addr;
return "ITRP";
}
static void
interp_set_memory_written_callback(struct cpu_driver* p_cpu_driver,
void (*memory_written_callback)(void* p),
void* p_memory_written_callback_object) {
struct interp_struct* p_interp = (struct interp_struct*) p_cpu_driver;
p_interp->p_memory_written_callback = memory_written_callback;
p_interp->p_memory_written_callback_object = p_memory_written_callback_object;
}
static inline void
interp_poll_irq_now(int* p_do_irq,
struct state_6502* p_state_6502,
uint8_t intf) {
if (!p_state_6502->abi_state.irq_fire) {
return;
}
if (state_6502_check_irq_firing(p_state_6502, k_state_6502_irq_nmi) ||
!intf) {
*p_do_irq = 1;
}
}
static void
interp_last_tick_callback(void* p) {
struct interp_struct* p_interp = (struct interp_struct*) p;
p_interp->callback_do_irq = 0;
interp_poll_irq_now(&p_interp->callback_do_irq,
p_interp->driver.abi.p_state_6502,
p_interp->callback_intf);
}
static void
interp_init(struct cpu_driver* p_cpu_driver) {
struct interp_struct* p_interp = (struct interp_struct*) p_cpu_driver;
struct memory_access* p_memory_access =
p_cpu_driver->p_extra->p_memory_access;
struct cpu_driver_funcs* p_funcs = p_cpu_driver->p_funcs;
struct debug_struct* p_debug = p_cpu_driver->abi.p_debug_object;
p_funcs->destroy = interp_destroy;
p_funcs->enter = interp_enter;
p_funcs->get_address_info = interp_get_address_info;
p_funcs->set_memory_written_callback = interp_set_memory_written_callback;
p_interp->p_mem_read = p_memory_access->p_mem_read;
p_interp->p_mem_write = p_memory_access->p_mem_write;
p_memory_access->memory_client_last_tick_callback = interp_last_tick_callback;
p_memory_access->p_last_tick_callback_obj = p_interp;
p_interp->debug_subsystem_active = debug_subsystem_active(p_debug);
p_interp->p_debug_interrupt = debug_get_interrupt(p_debug);
p_cpu_driver->p_funcs->get_opcode_maps(p_cpu_driver,
NULL,
NULL,
&p_interp->p_opcode_mem,
NULL);
}
struct cpu_driver*
interp_create(struct cpu_driver_funcs* p_funcs, int is_65c12) {
struct interp_struct* p_interp = util_mallocz(sizeof(struct interp_struct));
p_interp->is_65c12 = is_65c12;
p_funcs->init = interp_init;
return &p_interp->driver;
}
static inline void
interp_set_flags(uint8_t flags,
uint8_t* zf,
uint8_t* nf,
uint8_t* cf,
uint8_t* of,
uint8_t* df,
uint8_t* intf) {
*zf = ((flags & (1 << k_flag_zero)) != 0);
*nf = ((flags & (1 << k_flag_negative)) != 0);
*cf = ((flags & (1 << k_flag_carry)) != 0);
*of = ((flags & (1 << k_flag_overflow)) != 0);
*df = ((flags & (1 << k_flag_decimal)) != 0);
*intf = ((flags & (1 << k_flag_interrupt)) != 0);
}
static inline uint8_t
interp_get_flags(uint8_t zf,
uint8_t nf,
uint8_t cf,
uint8_t of,
uint8_t df,
uint8_t intf) {
uint8_t flags = 0;
flags |= (cf << k_flag_carry);
flags |= (zf << k_flag_zero);
flags |= (intf << k_flag_interrupt);
flags |= (df << k_flag_decimal);
flags |= (of << k_flag_overflow);
flags |= (nf << k_flag_negative);
return flags;
}
static inline void
interp_call_debugger(struct interp_struct* p_interp,
uint8_t* p_a,
uint8_t* p_x,
uint8_t* p_y,
uint8_t* p_s,
uint16_t* p_pc,
uint8_t* p_zf,
uint8_t* p_nf,
uint8_t* p_cf,
uint8_t* p_of,
uint8_t* p_df,
uint8_t* p_intf,
uint16_t irq_vector) {
uint8_t flags;
struct state_6502* p_state_6502 = p_interp->driver.abi.p_state_6502;
struct cpu_driver* p_cpu_driver = (struct cpu_driver*) p_interp;
void* (*debug_callback)(struct cpu_driver*, int) =
p_cpu_driver->abi.p_debug_callback;
flags = interp_get_flags(*p_zf, *p_nf, *p_cf, *p_of, *p_df, *p_intf);
state_6502_set_registers(p_state_6502,
*p_a,
*p_x,
*p_y,
*p_s,
flags,
*p_pc);
debug_callback(p_cpu_driver, irq_vector);
state_6502_get_registers(p_state_6502, p_a, p_x, p_y, p_s, &flags, p_pc);
interp_set_flags(flags, p_zf, p_nf, p_cf, p_of, p_df, p_intf);
}
static int
interp_is_branch_opcode(uint8_t opcode) {
if ((!(opcode & 0x0F)) && (opcode & 0x10)) {
return 1;
}
return 0;
}
static inline void
interp_check_log_bcd(struct interp_struct* p_interp) {
if ((p_interp->counter_bcd % 1000) == 0) {
log_do_log(k_log_instruction,
k_log_info,
"BCD mode was used (log every 1k)");
}
p_interp->counter_bcd++;
}
#define INTERP_TIMING_ADVANCE(num_cycles) \
countdown -= num_cycles; \
countdown = timing_advance_time(p_timing, countdown); \
#define INTERP_MEMORY_READ(addr_read) \
v = memory_read_callback(p_memory_obj, addr_read, pc, 0); \
countdown = timing_get_countdown(p_timing);
#define INTERP_MEMORY_READ_POLL_IRQ(addr_read) \
p_interp->callback_intf = intf; \
assert((p_interp->callback_do_irq = -1) == -1); \
v = memory_read_callback(p_memory_obj, addr_read, pc, 1); \
do_irq = p_interp->callback_do_irq; \
assert(do_irq != -1); \
countdown = timing_get_countdown(p_timing);
#define INTERP_MEMORY_WRITE(addr_write) \
if (memory_write_callback(p_memory_obj, addr_write, v, pc, 0) != 0) { \
write_callback_from = \
p_memory_access->memory_write_needs_callback_from(p_memory_obj); \
read_callback_from = \
p_memory_access->memory_read_needs_callback_from(p_memory_obj); \
assert(read_callback_from >= write_callback_from); \
} \
countdown = timing_get_countdown(p_timing);
#define INTERP_MEMORY_WRITE_POLL_IRQ(addr_write) \
p_interp->callback_intf = intf; \
assert((p_interp->callback_do_irq = -1) == -1); \
if (memory_write_callback(p_memory_obj, addr_write, v, pc, 1) != 0) { \
write_callback_from = \
p_memory_access->memory_write_needs_callback_from(p_memory_obj); \
read_callback_from = \
p_memory_access->memory_read_needs_callback_from(p_memory_obj); \
assert(read_callback_from >= write_callback_from); \
} \
do_irq = p_interp->callback_do_irq; \
assert(do_irq != -1); \
countdown = timing_get_countdown(p_timing);
#define INTERP_MODE_ABS_READ(INSTR) \
addr = *(uint8_t*) &p_mem_read[(uint16_t) (pc + 2)]; \
addr <<= 8; \
addr |= *(uint8_t*) &p_mem_read[(uint16_t) (pc + 1)]; \
pc += 3; \
if (addr < read_callback_from) { \
v = p_mem_read[addr]; \
INSTR; \
cycles_this_instruction = 4; \
} else { \
hit_special = 1; \
INTERP_TIMING_ADVANCE(2); \
interp_poll_irq_now(&do_irq, p_state_6502, intf); \
INTERP_TIMING_ADVANCE(1); \
INTERP_MEMORY_READ(addr); \
INSTR; \
goto check_irq; \
}
#define INTERP_MODE_65c12_BCD_ABS_READ(INSTR) \
addr = *(uint8_t*) &p_mem_read[(uint16_t) (pc + 2)]; \
addr <<= 8; \
addr |= *(uint8_t*) &p_mem_read[(uint16_t) (pc + 1)]; \
pc += 3; \
if (addr < read_callback_from) { \
v = p_mem_read[addr]; \
INSTR; \
cycles_this_instruction = 5; \
} else { \
hit_special = 1; \
INTERP_TIMING_ADVANCE(3); \
INTERP_MEMORY_READ_POLL_IRQ(addr); \
INSTR; \
INTERP_TIMING_ADVANCE(1); \
goto check_irq; \
}
#define INTERP_MODE_ABS_WRITE(INSTR) \
addr = *(uint8_t*) &p_mem_read[(uint16_t) (pc + 2)]; \
addr <<= 8; \
addr |= *(uint8_t*) &p_mem_read[(uint16_t) (pc + 1)]; \
pc += 3; \
if (addr < write_callback_from) { \
INSTR; \
p_mem_write[addr] = v; \
cycles_this_instruction = 4; \
} else { \
hit_special = 1; \
INTERP_TIMING_ADVANCE(2); \
interp_poll_irq_now(&do_irq, p_state_6502, intf); \
INTERP_TIMING_ADVANCE(1); \
INSTR; \
INTERP_MEMORY_WRITE(addr); \
goto check_irq; \
}
#define INTERP_MODE_ABS_READ_WRITE(INSTR) \
addr = *(uint8_t*) &p_mem_read[(uint16_t) (pc + 2)]; \
addr <<= 8; \
addr |= *(uint8_t*) &p_mem_read[(uint16_t) (pc + 1)]; \
pc += 3; \
if (addr < write_callback_from) { \
v = p_mem_read[addr]; \
INSTR; \
p_mem_write[addr] = v; \
cycles_this_instruction = 6; \
} else { \
hit_special = 1; \
INTERP_TIMING_ADVANCE(3); \
INTERP_MEMORY_READ(addr); \
if (is_65c12) { \
uint8_t v2 = v; \
INTERP_MEMORY_READ_POLL_IRQ(addr); \
v = v2; \
} else { \
INTERP_MEMORY_WRITE_POLL_IRQ(addr); \
} \
INSTR; \
INTERP_MEMORY_WRITE(addr); \
goto check_irq; \
}
#define INTERP_MODE_ABr_READ(INSTR, reg_name) \
addr_temp = *(uint8_t*) &p_mem_read[(uint16_t) (pc + 2)]; \
addr_temp <<= 8; \
addr_temp |= *(uint8_t*) &p_mem_read[(uint16_t) (pc + 1)]; \
addr = (addr_temp + reg_name); \
pc += 3; \
page_crossing = !!((addr_temp >> 8) ^ (addr >> 8)); \
if (addr < read_callback_from) { \
v = p_mem_read[addr]; \
INSTR; \
cycles_this_instruction = 4; \
cycles_this_instruction += page_crossing; \
} else { \
hit_special = 1; \
if (page_crossing) { \
if (is_65c12) { \
INTERP_TIMING_ADVANCE(3); \
interp_poll_irq_now(&do_irq, p_state_6502, intf); \
INTERP_TIMING_ADVANCE(1); \
} else { \
INTERP_TIMING_ADVANCE(3); \
INTERP_MEMORY_READ_POLL_IRQ(addr - 0x100); \
} \
} else { \
INTERP_TIMING_ADVANCE(2); \
interp_poll_irq_now(&do_irq, p_state_6502, intf); \
INTERP_TIMING_ADVANCE(1); \
} \
INTERP_MEMORY_READ(addr); \
INSTR; \
goto check_irq; \
}
#define INTERP_MODE_65c12_BCD_ABr_READ(INSTR, reg_name) \
addr_temp = *(uint8_t*) &p_mem_read[(uint16_t) (pc + 2)]; \
addr_temp <<= 8; \
addr_temp |= *(uint8_t*) &p_mem_read[(uint16_t) (pc + 1)]; \
pc += 3; \
page_crossing = !!((addr_temp >> 8) ^ (addr >> 8)); \
if (addr < read_callback_from) { \
v = p_mem_read[addr]; \
INSTR; \
cycles_this_instruction = 5; \
cycles_this_instruction += page_crossing; \
} else { \
hit_special = 1; \
if (page_crossing) { \
INTERP_TIMING_ADVANCE(4); \
} else { \
INTERP_TIMING_ADVANCE(3); \
} \
INTERP_MEMORY_READ_POLL_IRQ(addr); \
INSTR; \
INTERP_TIMING_ADVANCE(1); \
goto check_irq; \
}
#define INTERP_MODE_ABr_WRITE(INSTR, reg_name) \
addr_temp = *(uint8_t*) &p_mem_read[(uint16_t) (pc + 2)]; \
addr_temp <<= 8; \
addr_temp |= *(uint8_t*) &p_mem_read[(uint16_t) (pc + 1)]; \
addr = (addr_temp + reg_name); \
pc += 3; \
if (addr < write_callback_from) { \
INSTR; \
p_mem_write[addr] = v; \
cycles_this_instruction = 5; \
} else { \
hit_special = 1; \
if (is_65c12) { \
INTERP_TIMING_ADVANCE(3); \
interp_poll_irq_now(&do_irq, p_state_6502, intf); \
INTERP_TIMING_ADVANCE(1); \
} else { \
addr_temp = ((addr & 0xFF) | (addr_temp & 0xFF00)); \
INTERP_TIMING_ADVANCE(3); \
INTERP_MEMORY_READ_POLL_IRQ(addr_temp); \
} \
INSTR; \
INTERP_MEMORY_WRITE(addr); \
goto check_irq; \
}
#define INTERP_MODE_ABr_READ_WRITE(INSTR, reg_name) \
addr_temp = *(uint8_t*) &p_mem_read[(uint16_t) (pc + 2)]; \
addr_temp <<= 8; \
addr_temp |= *(uint8_t*) &p_mem_read[(uint16_t) (pc + 1)]; \
addr = (addr_temp + reg_name); \
pc += 3; \
if (addr < write_callback_from) { \
v = p_mem_read[addr]; \
INSTR; \
p_mem_write[addr] = v; \
cycles_this_instruction = 7; \
} else { \
hit_special = 1; \
if (is_65c12) { \
INTERP_TIMING_ADVANCE(4); \
INTERP_MEMORY_READ(addr); \
uint8_t v2 = v; \
INTERP_MEMORY_READ_POLL_IRQ(addr); \
v = v2; \
} else { \
INTERP_TIMING_ADVANCE(3); \
addr_temp = ((addr & 0xFF) | (addr_temp & 0xFF00)); \
INTERP_MEMORY_READ(addr_temp); \
INTERP_MEMORY_READ(addr); \
INTERP_MEMORY_WRITE_POLL_IRQ(addr); \
} \
INSTR; \
INTERP_MEMORY_WRITE(addr); \
goto check_irq; \
}
/* An optimization on the 65c12 only. */
#define INTERP_MODE_ABX_READ_WRITE_6_CYC(INSTR) \
addr_temp = *(uint8_t*) &p_mem_read[(uint16_t) (pc + 2)]; \
addr_temp <<= 8; \
addr_temp |= *(uint8_t*) &p_mem_read[(uint16_t) (pc + 1)]; \
addr = (addr_temp + x); \
pc += 3; \
page_crossing = !!((addr_temp >> 8) ^ (addr >> 8)); \
if (addr < write_callback_from) { \
v = p_mem_read[addr]; \
INSTR; \
p_mem_write[addr] = v; \
cycles_this_instruction = 6; \
cycles_this_instruction += page_crossing; \
} else { \
hit_special = 1; \
INTERP_TIMING_ADVANCE(3 + page_crossing); \
INTERP_MEMORY_READ(addr); \
INTERP_MEMORY_READ_POLL_IRQ(addr); \
INSTR; \
INTERP_MEMORY_WRITE(addr); \
goto check_irq; \
}
#define INTERP_MODE_IDX_READ(INSTR) \
addr = p_mem_read[(uint16_t) (pc + 1)]; \
addr += x; \
addr &= 0xFF; \
addr = ((p_mem_read[(uint8_t) (addr + 1)] << 8) | p_mem_read[addr]); \
pc += 2; \
if (addr < read_callback_from) { \
v = p_mem_read[addr]; \
INSTR; \
cycles_this_instruction = 6; \
} else { \
hit_special = 1; \
INTERP_TIMING_ADVANCE(4); \
interp_poll_irq_now(&do_irq, p_state_6502, intf); \
INTERP_TIMING_ADVANCE(1); \
INTERP_MEMORY_READ(addr); \
INSTR; \
goto check_irq; \
}
#define INTERP_MODE_65c12_BCD_IDX_READ(INSTR) \
addr = p_mem_read[(uint16_t) (pc + 1)]; \
addr += x; \
addr &= 0xFF; \
addr = ((p_mem_read[(uint8_t) (addr + 1)] << 8) | p_mem_read[addr]); \
pc += 2; \
if (addr < read_callback_from) { \
v = p_mem_read[addr]; \
INSTR; \
cycles_this_instruction = 7; \
} else { \
hit_special = 1; \
INTERP_TIMING_ADVANCE(5); \
INTERP_MEMORY_READ_POLL_IRQ(addr); \
INSTR; \
INTERP_TIMING_ADVANCE(1); \
goto check_irq; \
}
#define INTERP_MODE_IDX_WRITE(INSTR) \
addr = p_mem_read[(uint16_t) (pc + 1)]; \
addr += x; \
addr &= 0xFF; \
addr = ((p_mem_read[(uint8_t) (addr + 1)] << 8) | p_mem_read[addr]); \
pc += 2; \
if (addr < write_callback_from) { \
INSTR; \
p_mem_write[addr] = v; \
cycles_this_instruction = 6; \
} else { \
hit_special = 1; \
INTERP_TIMING_ADVANCE(4); \
interp_poll_irq_now(&do_irq, p_state_6502, intf); \
INTERP_TIMING_ADVANCE(1); \
INSTR; \
INTERP_MEMORY_WRITE(addr); \
goto check_irq; \
}
#define INTERP_MODE_IDX_READ_WRITE(INSTR) \
addr = p_mem_read[(uint16_t) (pc + 1)]; \
addr += x; \
addr &= 0xFF; \
addr = ((p_mem_read[(uint8_t) (addr + 1)] << 8) | p_mem_read[addr]); \
pc += 2; \
if (addr < write_callback_from) { \
v = p_mem_read[addr]; \
INSTR; \
p_mem_write[addr] = v; \
cycles_this_instruction = 8; \
} else { \
hit_special = 1; \
INTERP_TIMING_ADVANCE(5); \
INTERP_MEMORY_READ(addr); \
INTERP_MEMORY_WRITE_POLL_IRQ(addr); \
INSTR; \
INTERP_MEMORY_WRITE(addr); \
goto check_irq; \
}
#define INTERP_MODE_ID_READ(INSTR) \
addr = p_mem_read[(uint16_t) (pc + 1)]; \
addr = ((p_mem_read[(uint8_t) (addr + 1)] << 8) | p_mem_read[addr]); \
pc += 2; \
if (addr < read_callback_from) { \
v = p_mem_read[addr]; \
INSTR; \
cycles_this_instruction = 5; \
} else { \
hit_special = 1; \
INTERP_TIMING_ADVANCE(3); \
interp_poll_irq_now(&do_irq, p_state_6502, intf); \
INTERP_TIMING_ADVANCE(1); \
INTERP_MEMORY_READ(addr); \
INSTR; \
goto check_irq; \
}
#define INTERP_MODE_ID_WRITE(INSTR) \
addr = p_mem_read[(uint16_t) (pc + 1)]; \
addr = ((p_mem_read[(uint8_t) (addr + 1)] << 8) | p_mem_read[addr]); \
pc += 2; \
if (addr < write_callback_from) { \
INSTR; \
p_mem_write[addr] = v; \
cycles_this_instruction = 5; \
} else { \
hit_special = 1; \
INTERP_TIMING_ADVANCE(3); \
interp_poll_irq_now(&do_irq, p_state_6502, intf); \
INTERP_TIMING_ADVANCE(1); \
INSTR; \
INTERP_MEMORY_WRITE(addr); \
goto check_irq; \
}
#define INTERP_MODE_IDY_READ(INSTR) \
addr_temp = p_mem_read[(uint16_t) (pc + 1)]; \
addr_temp = ((p_mem_read[(uint8_t) (addr_temp + 1)] << 8) | \
p_mem_read[addr_temp]); \
addr = (addr_temp + y); \
page_crossing = !!((addr_temp >> 8) ^ (addr >> 8)); \
pc += 2; \
if (addr < read_callback_from) { \
v = p_mem_read[addr]; \
INSTR; \
cycles_this_instruction = 5; \
cycles_this_instruction += page_crossing; \
} else { \
hit_special = 1; \
if (page_crossing) { \
if (is_65c12) { \
INTERP_TIMING_ADVANCE(4); \
interp_poll_irq_now(&do_irq, p_state_6502, intf); \
INTERP_TIMING_ADVANCE(1); \
} else { \
INTERP_TIMING_ADVANCE(4); \
INTERP_MEMORY_READ_POLL_IRQ(addr - 0x100); \
} \
} else { \
INTERP_TIMING_ADVANCE(3); \
interp_poll_irq_now(&do_irq, p_state_6502, intf); \
INTERP_TIMING_ADVANCE(1); \
} \
INTERP_MEMORY_READ(addr); \
INSTR; \
goto check_irq; \
}
#define INTERP_MODE_65c12_BCD_IDY_READ(INSTR) \
addr_temp = p_mem_read[(uint16_t) (pc + 1)]; \
addr_temp = ((p_mem_read[(uint8_t) (addr_temp + 1)] << 8) | \
p_mem_read[addr_temp]); \
addr = (addr_temp + y); \
page_crossing = !!((addr_temp >> 8) ^ (addr >> 8)); \
pc += 2; \
if (addr < read_callback_from) { \
v = p_mem_read[addr]; \
INSTR; \
cycles_this_instruction = 6; \
cycles_this_instruction += page_crossing; \
} else { \
hit_special = 1; \
if (page_crossing) { \
INTERP_TIMING_ADVANCE(5); \
} else { \
INTERP_TIMING_ADVANCE(4); \
} \
INTERP_MEMORY_READ_POLL_IRQ(addr); \
INSTR; \
INTERP_TIMING_ADVANCE(1); \
}
#define INTERP_MODE_IDY_WRITE(INSTR) \
addr_temp = p_mem_read[(uint16_t) (pc + 1)]; \
addr_temp = ((p_mem_read[(uint8_t) (addr_temp + 1)] << 8) | \
p_mem_read[addr_temp]); \
addr = (addr_temp + y); \
pc += 2; \
if (addr < write_callback_from) { \
INSTR; \
p_mem_write[addr] = v; \
cycles_this_instruction = 6; \
} else { \
hit_special = 1; \
if (is_65c12) { \
INTERP_TIMING_ADVANCE(4); \
interp_poll_irq_now(&do_irq, p_state_6502, intf); \
INTERP_TIMING_ADVANCE(1); \
} else { \
addr_temp = ((addr & 0xFF) | (addr_temp & 0xFF00)); \
INTERP_TIMING_ADVANCE(4); \
INTERP_MEMORY_READ_POLL_IRQ(addr_temp); \
} \
INSTR; \
INTERP_MEMORY_WRITE(addr); \
goto check_irq; \
}
#define INTERP_MODE_IDY_READ_WRITE(INSTR) \
addr_temp = p_mem_read[(uint16_t) (pc + 1)]; \
addr_temp = ((p_mem_read[(uint8_t) (addr_temp + 1)] << 8) | \
p_mem_read[addr_temp]); \
addr = (addr_temp + y); \
pc += 2; \
if (addr < write_callback_from) { \
v = p_mem_read[addr]; \
INSTR; \
p_mem_write[addr] = v; \
cycles_this_instruction = 8; \
} else { \
hit_special = 1; \
addr_temp = ((addr & 0xFF) | (addr_temp & 0xFF00)); \
INTERP_TIMING_ADVANCE(4); \
INTERP_MEMORY_READ(addr_temp); \
INTERP_MEMORY_READ(addr); \
INTERP_MEMORY_WRITE_POLL_IRQ(addr); \
INSTR; \
INTERP_MEMORY_WRITE(addr); \
goto check_irq; \
}
#define INTERP_MODE_ZPG_READ(INSTR) \
addr = p_mem_read[(uint16_t) (pc + 1)]; \
pc += 2; \
v = p_mem_read[addr]; \
INSTR; \
cycles_this_instruction = 3;
#define INTERP_MODE_ZPG_READ_WRITE(INSTR) \
addr = p_mem_read[(uint16_t) (pc + 1)]; \
pc += 2; \
v = p_mem_read[addr]; \
INSTR; \
p_mem_write[addr] = v; \
cycles_this_instruction = 5;
#define INTERP_MODE_ZPG_WRITE(INSTR) \
addr = p_mem_read[(uint16_t) (pc + 1)]; \
pc += 2; \
INSTR; \
p_mem_write[addr] = v; \
cycles_this_instruction = 3;
#define INTERP_MODE_ZPr_READ(INSTR, reg_name) \
addr = p_mem_read[(uint16_t) (pc + 1)]; \
pc += 2; \
addr += reg_name; \
addr &= 0xFF; \
v = p_mem_read[addr]; \
INSTR; \
cycles_this_instruction = 4;
#define INTERP_MODE_ZPr_WRITE(INSTR, reg_name) \
addr = p_mem_read[(uint16_t) (pc + 1)]; \
pc += 2; \
addr += reg_name; \
addr &= 0xFF; \
INSTR; \
p_mem_write[addr] = v; \
cycles_this_instruction = 4;
#define INTERP_MODE_ZPX_READ_WRITE(INSTR) \
addr = p_mem_read[(uint16_t) (pc + 1)]; \
pc += 2; \
addr += x; \
addr &= 0xFF; \
v = p_mem_read[addr]; \
INSTR; \
p_mem_write[addr] = v; \
cycles_this_instruction = 6;
#define INTERP_LOAD_NZ_FLAGS(reg_name) \
nf = !!(reg_name & 0x80); \
zf = (reg_name == 0);
#define INTERP_INSTR_BRANCH(condition) \
v = p_mem_read[(uint16_t) (pc + 1)]; \
cycles_this_instruction = 2; \
pc += 2; \
if (condition) { \
addr_temp = pc; \
cycles_this_instruction++; \
pc = (uint16_t) ((int) addr_temp + (int8_t) v); \
/* Add a cycle if the branch crossed a page. */ \
if ((pc >> 8) ^ (addr_temp >> 8)) { \
cycles_this_instruction++; \
} \
}
#define INTERP_INSTR_ADC() \
temp_int = (a + v + cf); \
zf = !(temp_int & 0xFF); \
/* http://www.righto.com/2012/12/the-6502-overflow-flag-explained.html */ \
of = !!((a ^ temp_int) & (v ^ temp_int) & 0x80); \
nf = !!(temp_int & 0x80); \
cf = (temp_int >= 0x100); \
a = temp_int;
#define INTERP_INSTR_BCD_ADC() \
temp_int = (a + v + cf); \
zf = !(temp_int & 0xFF); \
if (df) { \
interp_check_log_bcd(p_interp); \
/* Fix up decimal carry on first nibble. */ \
int decimal_carry = ((a & 0x0F) + (v & 0x0F) + cf); \
if (decimal_carry >= 0x0A) { \
temp_int += 0x06; \
if (decimal_carry >= 0x1A) { \
temp_int -= 0x10; \
} \
} \
} \
/* http://www.righto.com/2012/12/the-6502-overflow-flag-explained.html */ \
of = !!((a ^ temp_int) & (v ^ temp_int) & 0x80); \
nf = !!(temp_int & 0x80); \
if (df) { \
if (temp_int >= 0xA0) { \
temp_int += 0x60; \
} \
} \
cf = (temp_int >= 0x100); \
a = temp_int;
#define INTERP_INSTR_AHX() \
v = (a & x & ((addr >> 8) + 1));
#define INTERP_INSTR_AND() \
a &= v; \
INTERP_LOAD_NZ_FLAGS(a);
#define INTERP_INSTR_ASL() \
cf = !!(v & 0x80); \
v <<= 1; \
INTERP_LOAD_NZ_FLAGS(v);
#define INTERP_INSTR_BIT() \
zf = !(a & v); \
nf = !!(v & 0x80); \
of = !!(v & 0x40);
#define INTERP_INSTR_CMP(reg_name) \
cf = (reg_name >= v); \
v = (reg_name - v); \
INTERP_LOAD_NZ_FLAGS(v);
#define INTERP_INSTR_DCP() \
v--; \
INTERP_LOAD_NZ_FLAGS((a - v)); \
cf = (a >= v);
#define INTERP_INSTR_DEC() \
v--; \
INTERP_LOAD_NZ_FLAGS(v);
#define INTERP_INSTR_EOR() \
a ^= v; \
INTERP_LOAD_NZ_FLAGS(a);
#define INTERP_INSTR_INC() \
v++; \
INTERP_LOAD_NZ_FLAGS(v);
#define INTERP_INSTR_ISC() \
v++; \
if (df) { \
INTERP_INSTR_BCD_SBC(); \
} else { \
INTERP_INSTR_SBC(); \
}
#define INTERP_INSTR_KIL() \
if (!(special_checks & k_interp_special_KIL)) { \
log_do_log(k_log_instruction, \
k_log_info, \
"entering KIL state, pc $%.4x opcode $%.2x", \
pc, \
opcode); \
} \
special_checks |= k_interp_special_KIL; \
cycles_this_instruction = 7;
#define INTERP_INSTR_LAX() \
a = v; \
x = v; \
INTERP_LOAD_NZ_FLAGS(v);
#define INTERP_INSTR_LDA() \
a = v; \
INTERP_LOAD_NZ_FLAGS(v);
#define INTERP_INSTR_LDX() \
x = v; \
INTERP_LOAD_NZ_FLAGS(v);
#define INTERP_INSTR_LDY() \
y = v; \
INTERP_LOAD_NZ_FLAGS(v);
#define INTERP_INSTR_LSR() \
cf = (v & 0x01); \
v >>= 1; \
INTERP_LOAD_NZ_FLAGS(v);
#define INTERP_INSTR_NOP()
#define INTERP_INSTR_ORA() \
a |= v; \
INTERP_LOAD_NZ_FLAGS(a);
#define INTERP_INSTR_RLA() \
temp_int = cf; \
cf = !!(v & 0x80); \
v <<= 1; \
v |= temp_int; \
a &= v; \
INTERP_LOAD_NZ_FLAGS(a);
#define INTERP_INSTR_ROL() \
temp_int = cf; \
cf = !!(v & 0x80); \
v <<= 1; \
v |= temp_int; \
INTERP_LOAD_NZ_FLAGS(v);
#define INTERP_INSTR_ROR() \
temp_int = cf; \
cf = (v & 0x01); \
v >>= 1; \
v |= (temp_int << 7); \
INTERP_LOAD_NZ_FLAGS(v);
#define INTERP_INSTR_RRA() \
temp_int = cf; \
cf = (v & 0x01); \
v >>= 1; \
v |= (temp_int << 7); \
if (df) { \
INTERP_INSTR_BCD_ADC(); \
} else { \
INTERP_INSTR_ADC(); \
}
#define INTERP_INSTR_SAX() \
v = (a & x);
#define INTERP_INSTR_SBC() \
/* http://www.righto.com/2012/12/the-6502-overflow-flag-explained.html */ \
/* "SBC simply takes the ones complement of the second value and then \
* performs an ADC" \
*/ \
temp_int = (a + (uint8_t) ~v + cf); \
/* http://www.righto.com/2012/12/the-6502-overflow-flag-explained.html */ \
of = !!((a ^ temp_int) & ((uint8_t) ~v ^ temp_int) & 0x80); \
/* In decimal mode, NZ flags are based on this interim value. */ \
INTERP_LOAD_NZ_FLAGS((temp_int & 0xFF)); \
cf = !!(temp_int & 0x100); \
a = temp_int;
#define INTERP_INSTR_BCD_SBC() \
/* http://www.righto.com/2012/12/the-6502-overflow-flag-explained.html */ \
/* "SBC simply takes the ones complement of the second value and then \
* performs an ADC" \
*/ \
temp_int = (a + (uint8_t) ~v + cf); \
if (df) { \
interp_check_log_bcd(p_interp); \
/* Fix up decimal carry on first nibble. */ \
if (((v & 0x0F) + !cf) > (a & 0x0F)) { \
temp_int -= 0x06; \
} \
} \
/* http://www.righto.com/2012/12/the-6502-overflow-flag-explained.html */ \
of = !!((a ^ temp_int) & ((uint8_t) ~v ^ temp_int) & 0x80); \
/* In decimal mode, NZ flags are based on this interim value. */ \
INTERP_LOAD_NZ_FLAGS((temp_int & 0xFF)); \
if (df) { \
if ((v + !cf) > a) { \
temp_int -= 0x60; \
} \
} \
cf = !!(temp_int & 0x100); \
a = temp_int;
#define INTERP_INSTR_SHY() \
v = (y & ((addr_temp >> 8) + 1));
#define INTERP_INSTR_SLO() \
cf = !!(v & 0x80); \
v <<= 1; \
a |= v; \
INTERP_LOAD_NZ_FLAGS(a);
#define INTERP_INSTR_SRE() \
cf = (v & 0x01); \
v >>= 1; \
a ^= v; \
INTERP_LOAD_NZ_FLAGS(a);
#define INTERP_INSTR_STA() \
v = a;
#define INTERP_INSTR_STX() \
v = x;
#define INTERP_INSTR_STY() \
v = y;
#define INTERP_INSTR_STZ() \
v = 0;