Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

UART output garbled when building Litex SoC for CrossLinkNX with Radiant 2024.2 #2172

Open
polymerizedsage opened this issue Feb 3, 2025 · 0 comments

Comments

@polymerizedsage
Copy link

I am developing a Litex-based SoC my project girlvoice. I have been using Radiant 2023.2 for most of my development but recently updated to Radiant 2024.2. When building with the older version of Radiant the SoC boots and I get coherent UART output, however after updating to the newer toolchain, the UART output is garbled with invalid characters.

The design uses a custom PCB with a Lattice CrossLinkNX-17 72-pin QFN speed grade 8 device. I am using the latest version of Litex distributed on Pypi, which I believe is 2023.12. If it would be helpful I can post an example of the garbled boot output of the SoC

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

1 participant