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cpu/vexiiriscv integration ci #2951: Pull request #1923 synchronize by Dolu1990
May 16, 2024 15:12 24m 4s Dolu1990:vexiiriscv
Dolu1990:vexiiriscv
May 16, 2024 15:12 24m 4s
Merge pull request #1954 from enjoy-digital/vexriscv_smp_irqs ci #2950: Commit d7b4c7b pushed by enjoy-digital
May 16, 2024 08:55 24m 41s master
master
May 16, 2024 08:55 24m 41s
Add baremetal IRQ support to VexRiscv-SMP and NaxRiscv. ci #2949: Pull request #1954 opened by enjoy-digital
May 16, 2024 08:52 23m 45s vexriscv_smp_irqs
vexriscv_smp_irqs
May 16, 2024 08:52 23m 45s
inteconnect/axi_lite/wishbone SRAM: Switch back to LiteXModule and ad… ci #2948: Commit fbf03ec pushed by enjoy-digital
May 16, 2024 08:36 23m 28s master
master
May 16, 2024 08:36 23m 28s
integration/export/_generate_csr_header_includes_c: Fix refactoring i… ci #2947: Commit c0d9224 pushed by enjoy-digital
May 16, 2024 07:19 24m 22s master
master
May 16, 2024 07:19 24m 22s
cores/cpu/naxriscv: Add baremetal IRQ support ci #2946: Commit d4c1a10 pushed by Dolu1990
May 14, 2024 12:57 23m 50s vexriscv_smp_irqs
vexriscv_smp_irqs
May 14, 2024 12:57 23m 50s
software/libbase/isr.c: Simplify using __riscv_plic__ define. ci #2945: Commit e03b097 pushed by enjoy-digital
May 14, 2024 12:47 24m 45s vexriscv_smp_irqs
vexriscv_smp_irqs
May 14, 2024 12:47 24m 45s
cores/cpu/vexriscv_smp: fix PLIC_EXT_IRQ_BASE ci #2944: Commit 786c929 pushed by Dolu1990
May 14, 2024 12:24 26m 40s vexriscv_smp_irqs
vexriscv_smp_irqs
May 14, 2024 12:24 26m 40s
Merge pull request #1953 from enjoy-digital/export_csr_c_rework ci #2943: Commit 8a83585 pushed by enjoy-digital
May 14, 2024 10:54 23m 12s master
master
May 14, 2024 10:54 23m 12s
Simplify/Cleanup C exports and disable Fields accessors generation by default. ci #2942: Pull request #1953 opened by enjoy-digital
May 14, 2024 10:54 24m 10s export_csr_c_rework
export_csr_c_rework
May 14, 2024 10:54 24m 10s
test/test_cpu: Disable cv32e40p test (need to update/wait for pythond… ci #2941: Commit 8eaa53a pushed by enjoy-digital
May 14, 2024 10:53 23m 51s master
master
May 14, 2024 10:53 23m 51s
Merge pull request #1951 from nuntipat/update-cv32e40p ci #2940: Commit c810b89 pushed by enjoy-digital
May 14, 2024 10:11 24m 13s master
master
May 14, 2024 10:11 24m 13s
Merge pull request #1952 from nuntipat/fix-csr-def-cv32e41p ci #2939: Commit 9b6e231 pushed by enjoy-digital
May 14, 2024 10:08 22m 55s master
master
May 14, 2024 10:08 22m 55s
soc/integration/builder: Disable fields_access_functions generation b… ci #2938: Commit 46911d5 pushed by enjoy-digital
May 14, 2024 09:59 24m 43s export_csr_c_rework
export_csr_c_rework
May 14, 2024 09:59 24m 43s
integration/export: Fix read_function refactoring. ci #2937: Commit 2574cc1 pushed by enjoy-digital
May 14, 2024 09:56 23m 47s export_csr_c_rework
export_csr_c_rework
May 14, 2024 09:56 23m 47s
cpu/vexiiriscv integration ci #2936: Pull request #1923 synchronize by Dolu1990
May 14, 2024 09:41 23m 57s Dolu1990:vexiiriscv
Dolu1990:vexiiriscv
May 14, 2024 09:41 23m 57s
soc/integration/export: Add parameter to enable/disable fields access… ci #2935: Commit 29bb397 pushed by enjoy-digital
May 14, 2024 09:23 23m 39s export_csr_c_rework
export_csr_c_rework
May 14, 2024 09:23 23m 39s
cores/cpu/vexriscv_smp: Prepare IRQ support based on Rocket IRQ suppo… ci #2934: Commit 3506a5e pushed by enjoy-digital
May 14, 2024 08:04 23m 37s vexriscv_smp_irqs
vexriscv_smp_irqs
May 14, 2024 08:04 23m 37s
interconnect/packet/Status: Simplify logic. ci #2929: Commit 2613ae6 pushed by enjoy-digital
May 13, 2024 15:52 24m 2s master
master
May 13, 2024 15:52 24m 2s
CHANGES: Update. ci #2928: Commit 8b175c2 pushed by enjoy-digital
May 13, 2024 14:33 26m 10s master
master
May 13, 2024 14:33 26m 10s
Merge pull request #1948 from Liamolucko/riscv-triples ci #2927: Commit 0d3a822 pushed by enjoy-digital
May 7, 2024 13:15 24m 28s master
master
May 7, 2024 13:15 24m 28s
Merge pull request #1945 from Nicolas-Gaudin/master ci #2926: Commit b61e8b5 pushed by enjoy-digital
May 7, 2024 13:13 23m 17s master
master
May 7, 2024 13:13 23m 17s
Merge pull request #1946 from nrndda/AXILite_LitexXModule_revert ci #2925: Commit e4cfe87 pushed by enjoy-digital
May 7, 2024 13:10 23m 17s master
master
May 7, 2024 13:10 23m 17s
The case when AWVALID and WVALID are not asserted at the same cycle ci #2924: Pull request #1949 opened by alexey-morozov
May 7, 2024 11:50 23m 23s alexey-morozov:master
alexey-morozov:master
May 7, 2024 11:50 23m 23s
cpu/vexiiriscv integration ci #2923: Pull request #1923 synchronize by Dolu1990
May 6, 2024 17:49 23m 34s Dolu1990:vexiiriscv
Dolu1990:vexiiriscv
May 6, 2024 17:49 23m 34s
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