diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index d63c56c077..c56e32e314 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -8,6 +8,7 @@ jobs: strategy: matrix: platform: [posix, s32k148] + cpp-standard: [14, 17, 20] steps: - name: Checkout repository @@ -20,9 +21,9 @@ jobs: path: | cmake-build-posix cmake-build-s32k148 - key: ${{ runner.os }}-cmake-${{ matrix.platform }}-${{ hashFiles('**/*.cpp', '**/*.h', '**/*.cmake', '**/*.txt', '**/*.c', '**/*.s', 'admin/cmake/ArmNoneEabi.cmake') }} + key: ${{ runner.os }}-cmake-${{ matrix.platform }}-${{ matrix.cpp-standard }}-${{ hashFiles('**/*.cpp', '**/*.h', '**/*.cmake', '**/*.txt', '**/*.c', '**/*.s', 'admin/cmake/ArmNoneEabi.cmake') }} restore-keys: | - ${{ runner.os }}-cmake-${{ matrix.platform }}- + ${{ runner.os }}-cmake-${{ matrix.platform }}-${{ matrix.cpp-standard }}- - name: Set up CMake uses: jwlawson/actions-setup-cmake@v2 @@ -37,12 +38,22 @@ jobs: - name: Configure CMake for POSIX if: ${{ matrix.platform == 'posix' && steps.cache-cmake.outputs.cache-hit != 'true' }} - run: cmake -B cmake-build-posix -S executables/referenceApp + run: | + cmake \ + -B cmake-build-posix \ + -S executables/referenceApp \ + -DCMAKE_CXX_STANDARD=${{ matrix.cpp-standard }} - name: Configure CMake for S32K148 if: ${{ matrix.platform == 's32k148' && steps.cache-cmake.outputs.cache-hit != 'true' }} - run: cmake -B cmake-build-s32k148 -S executables/referenceApp -DBUILD_TARGET_PLATFORM="S32K148EVB" --toolchain ../../admin/cmake/ArmNoneEabi.cmake + run: | + cmake \ + -B cmake-build-s32k148 \ + -S executables/referenceApp \ + -DCMAKE_CXX_STANDARD=${{ matrix.cpp-standard }} \ + -DBUILD_TARGET_PLATFORM="S32K148EVB" \ + --toolchain ../../admin/cmake/ArmNoneEabi.cmake - name: Build for ${{ matrix.platform }} if: steps.cache-cmake.outputs.cache-hit != 'true' - run: cmake --build cmake-build-${{ matrix.platform }} --target app.referenceApp -j \ No newline at end of file + run: cmake --build cmake-build-${{ matrix.platform }} --target app.referenceApp -j diff --git a/executables/referenceApp/platforms/s32k148evb/bspConfiguration/include/bsp/io/io/ioConfiguration.h b/executables/referenceApp/platforms/s32k148evb/bspConfiguration/include/bsp/io/io/ioConfiguration.h index 44aca4fb1b..208d92023a 100644 --- a/executables/referenceApp/platforms/s32k148evb/bspConfiguration/include/bsp/io/io/ioConfiguration.h +++ b/executables/referenceApp/platforms/s32k148evb/bspConfiguration/include/bsp/io/io/ioConfiguration.h @@ -5,105 +5,108 @@ #if defined(BSP_IO_PIN_CONFIGURATION) && (BSP_IO_PIN_CONFIGURATION == 1) Io::PinConfiguration const Io::fPinConfiguration[Io::NUMBER_OF_IOS] = { - - /* 00 */ {_PORTA_, PA0, _IN, FILTER_ACTIVE | FILTER_TICK1, GPIO}, - /* 01 */ {_PORTA_, PA1, _OUT, FILTER_ACTIVE | FILTER_TICK1, GPIO | STRENGTH_ON}, - /* 02 */ {_PORTA_, PA2, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 03 */ {_PORTA_, PA3, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 04 */ {_PORTA_, PA4, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 05 */ {_PORTA_, PA5, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 06 */ {_PORTA_, PA6, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 07 */ {_PORTA_, PA7, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 08 */ {_PORTA_, PA8, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 09 */ {_PORTA_, PA9, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 10 */ {_PORTA_, PA10, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 11 */ {_PORTA_, PA11, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 12 */ {_PORTA_, PA12, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 13 */ {_PORTA_, PA13, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 14 */ {_PORTA_, PA14, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 15 */ {_PORTA_, PA15, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 16 */ {_PORTA_, PA16, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 17 */ {_PORTA_, PA17, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - - /* 18 */ {_PORTB_, PB0, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 19 */ {_PORTB_, PB1, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 20 */ {_PORTB_, PB2, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 21 */ {_PORTB_, PB3, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 22 */ {_PORTB_, PB4, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 23 */ {_PORTB_, PB5, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 24 */ {_PORTB_, PB6, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 25 */ {_PORTB_, PB7, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 26 */ {_PORTB_, PB8, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 27 */ {_PORTB_, PB9, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 28 */ {_PORTB_, PB10, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 29 */ {_PORTB_, PB11, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 30 */ {_PORTB_, PB12, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 31 */ {_PORTB_, PB13, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 32 */ {_PORTB_, PB14, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 33 */ {_PORTB_, PB15, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 34 */ {_PORTB_, PB16, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 35 */ {_PORTB_, PB17, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - - /* 36 */ {_PORTC_, PC0, _IN, FILTER_ACTIVE | FILTER_TICK1, ALT3}, - /* 37 */ {_PORTC_, PC1, _OUT, FILTER_ACTIVE | FILTER_TICK1, ALT3 | STRENGTH_ON}, - /* 38 */ {_PORTC_, PC2, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 39 */ {_PORTC_, PC3, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 40 */ {_PORTC_, PC4, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 41 */ {_PORTC_, PC5, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, + // clang-format off + + /* 00 */ {_PORTA_, PA0, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, GPIO}, + /* 01 */ {_PORTA_, PA1, _OUT, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, (uint32_t) GPIO | (uint32_t) STRENGTH_ON}, + /* 02 */ {_PORTA_, PA2, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 03 */ {_PORTA_, PA3, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 04 */ {_PORTA_, PA4, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 05 */ {_PORTA_, PA5, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 06 */ {_PORTA_, PA6, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 07 */ {_PORTA_, PA7, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 08 */ {_PORTA_, PA8, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 09 */ {_PORTA_, PA9, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 10 */ {_PORTA_, PA10, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 11 */ {_PORTA_, PA11, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 12 */ {_PORTA_, PA12, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 13 */ {_PORTA_, PA13, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 14 */ {_PORTA_, PA14, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 15 */ {_PORTA_, PA15, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 16 */ {_PORTA_, PA16, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 17 */ {_PORTA_, PA17, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + + /* 18 */ {_PORTB_, PB0, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 19 */ {_PORTB_, PB1, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 20 */ {_PORTB_, PB2, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 21 */ {_PORTB_, PB3, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 22 */ {_PORTB_, PB4, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 23 */ {_PORTB_, PB5, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 24 */ {_PORTB_, PB6, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 25 */ {_PORTB_, PB7, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 26 */ {_PORTB_, PB8, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 27 */ {_PORTB_, PB9, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 28 */ {_PORTB_, PB10, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 29 */ {_PORTB_, PB11, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 30 */ {_PORTB_, PB12, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 31 */ {_PORTB_, PB13, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 32 */ {_PORTB_, PB14, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 33 */ {_PORTB_, PB15, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 34 */ {_PORTB_, PB16, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 35 */ {_PORTB_, PB17, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + + /* 36 */ {_PORTC_, PC0, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, ALT3}, + /* 37 */ {_PORTC_, PC1, _OUT, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, (uint32_t) ALT3 | (uint32_t) STRENGTH_ON}, + /* 38 */ {_PORTC_, PC2, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 39 */ {_PORTC_, PC3, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 40 */ {_PORTC_, PC4, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 41 */ {_PORTC_, PC5, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, /* 42 */ {_PORTC_, PC6, _IN, 0, ALT2}, - /* 43 */ {_PORTC_, PC7, _OUT, 0, ALT2 | STRENGTH_ON}, + /* 43 */ {_PORTC_, PC7, _OUT, 0, (uint32_t) ALT2 | (uint32_t) STRENGTH_ON}, /* 44 */ {_PORTC_, PC8, _IN, 0, ALT2}, - /* 45 */ {_PORTC_, PC9, _OUT, 0, ALT2 | STRENGTH_ON}, - /* 46 */ {_PORTC_, PC10, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 47 */ {_PORTC_, PC11, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 48 */ {_PORTC_, PC12, _IN, FILTER_ACTIVE | FILTER_TICK1, GPIO}, - /* 49 */ {_PORTC_, PC13, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 50 */ {_PORTC_, PC14, _OUT, FILTER_ACTIVE | FILTER_TICK1, GPIO | STRENGTH_ON}, - /* 51 */ {_PORTC_, PC15, _OUT, FILTER_ACTIVE | FILTER_TICK1, ALT3 | STRENGTH_ON}, - /* 52 */ {_PORTC_, PC16, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 53 */ {_PORTC_, PC17, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 54 */ {_PORTC_, PC28, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 55 */ {_PORTC_, PC29, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - - /* 56 */ {_PORTD_, PD0, _OUT, 0, ALT3 | STRENGTH_ON | PULLUP}, - /* 57 */ {_PORTD_, PD1, _IN, 0, ALT3 | PULLUP}, - /* 58 */ {_PORTD_, PD2, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 59 */ {_PORTD_, PD3, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 60 */ {_PORTD_, PD4, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 61 */ {_PORTD_, PD5, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, + /* 45 */ {_PORTC_, PC9, _OUT, 0, (uint32_t) ALT2 | (uint32_t) STRENGTH_ON}, + /* 46 */ {_PORTC_, PC10, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 47 */ {_PORTC_, PC11, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 48 */ {_PORTC_, PC12, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, GPIO}, + /* 49 */ {_PORTC_, PC13, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 50 */ {_PORTC_, PC14, _OUT, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, (uint32_t) GPIO | (uint32_t) STRENGTH_ON}, + /* 51 */ {_PORTC_, PC15, _OUT, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, (uint32_t) ALT3 | (uint32_t) STRENGTH_ON}, + /* 52 */ {_PORTC_, PC16, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 53 */ {_PORTC_, PC17, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 54 */ {_PORTC_, PC28, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 55 */ {_PORTC_, PC29, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + + /* 56 */ {_PORTD_, PD0, _OUT, 0, (uint32_t) ALT3 | (uint32_t) (uint32_t) STRENGTH_ON | (uint32_t) PULLUP}, + /* 57 */ {_PORTD_, PD1, _IN, 0, (uint32_t) ALT3 | (uint32_t) PULLUP}, + /* 58 */ {_PORTD_, PD2, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 59 */ {_PORTD_, PD3, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 60 */ {_PORTD_, PD4, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 61 */ {_PORTD_, PD5, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, /* 62 */ {_PORTD_, PD6, _IN, 0, ALT2}, - /* 63 */ {_PORTD_, PD7, _OUT, 0, ALT2 | STRENGTH_ON}, - /* 64 */ {_PORTD_, PD8, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 65 */ {_PORTD_, PD9, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 66 */ {_PORTD_, PD10, _OUT, FILTER_ACTIVE | FILTER_TICK1, GPIO | STRENGTH_ON | PULLUP}, - /* 67 */ {_PORTD_, PD11, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 68 */ {_PORTD_, PD12, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 69 */ {_PORTD_, PD13, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 70 */ {_PORTD_, PD14, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 71 */ {_PORTD_, PD15, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 72 */ {_PORTD_, PD16, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 73 */ {_PORTD_, PD17, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - - /* 75 */ {_PORTE_, PE0, _OUT, 0, ALT5 | STRENGTH_ON}, - /* 76 */ {_PORTE_, PE1, _OUT, 0, GPIO | STRENGTH_ON | PULLUP}, - /* 77 */ {_PORTE_, PE2, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 78 */ {_PORTE_, PE3, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, + /* 63 */ {_PORTD_, PD7, _OUT, 0, (uint32_t) ALT2 | (uint32_t) STRENGTH_ON}, + /* 64 */ {_PORTD_, PD8, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 65 */ {_PORTD_, PD9, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 66 */ {_PORTD_, PD10, _OUT, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, (uint32_t) GPIO | (uint32_t) (uint32_t) STRENGTH_ON | (uint32_t) PULLUP}, + /* 67 */ {_PORTD_, PD11, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 68 */ {_PORTD_, PD12, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 69 */ {_PORTD_, PD13, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 70 */ {_PORTD_, PD14, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 71 */ {_PORTD_, PD15, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 72 */ {_PORTD_, PD16, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 73 */ {_PORTD_, PD17, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + + /* 75 */ {_PORTE_, PE0, _OUT, 0, (uint32_t) ALT5 | (uint32_t) STRENGTH_ON}, + /* 76 */ {_PORTE_, PE1, _OUT, 0, (uint32_t) GPIO | (uint32_t) (uint32_t) STRENGTH_ON | (uint32_t) PULLUP}, + /* 77 */ {_PORTE_, PE2, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 78 */ {_PORTE_, PE3, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, /* 79 */ {_PORTE_, PE4, _IN, 0, ALT5}, - /* 80 */ {_PORTE_, PE5, _OUT, 0, ALT5 | STRENGTH_ON}, - /* 81 */ {_PORTE_, PE6, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 82 */ {_PORTE_, PE7, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 83 */ {_PORTE_, PE8, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 84 */ {_PORTE_, PE9, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 85 */ {_PORTE_, PE10, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 86 */ {_PORTE_, PE11, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 87 */ {_PORTE_, PE12, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 88 */ {_PORTE_, PE13, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 89 */ {_PORTE_, PE14, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 90 */ {_PORTE_, PE15, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 91 */ {_PORTE_, PE16, _IN, FILTER_ACTIVE | FILTER_TICK1, PINDISABLE}, - /* 92 */ {_PORTE_, PE21, _OUT, FILTER_ACTIVE | FILTER_TICK1, GPIO | STRENGTH_ON}, - /* 93 */ {_PORTE_, PE22, _OUT, FILTER_ACTIVE | FILTER_TICK1, ALT2 | STRENGTH_ON}, - /* 94 */ {_PORTE_, PE23, _OUT, FILTER_ACTIVE | FILTER_TICK1, ALT2 | STRENGTH_ON}, + /* 80 */ {_PORTE_, PE5, _OUT, 0, (uint32_t) ALT5 | (uint32_t) STRENGTH_ON}, + /* 81 */ {_PORTE_, PE6, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 82 */ {_PORTE_, PE7, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 83 */ {_PORTE_, PE8, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 84 */ {_PORTE_, PE9, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 85 */ {_PORTE_, PE10, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 86 */ {_PORTE_, PE11, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 87 */ {_PORTE_, PE12, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 88 */ {_PORTE_, PE13, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 89 */ {_PORTE_, PE14, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 90 */ {_PORTE_, PE15, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 91 */ {_PORTE_, PE16, _IN, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, PINDISABLE}, + /* 92 */ {_PORTE_, PE21, _OUT, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, (uint32_t) GPIO | (uint32_t) STRENGTH_ON}, + /* 93 */ {_PORTE_, PE22, _OUT, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, (uint32_t) ALT2 | (uint32_t) STRENGTH_ON}, + /* 94 */ {_PORTE_, PE23, _OUT, (uint8_t) FILTER_ACTIVE | (uint8_t) FILTER_TICK1, (uint32_t) ALT2 | (uint32_t) STRENGTH_ON}, + + // clang-format on }; #else diff --git a/executables/referenceApp/platforms/s32k148evb/bspConfiguration/src/bsp/SystemTimer/SystemTimer.cpp b/executables/referenceApp/platforms/s32k148evb/bspConfiguration/src/bsp/SystemTimer/SystemTimer.cpp index b3a34d5d54..bd6bf103ab 100644 --- a/executables/referenceApp/platforms/s32k148evb/bspConfiguration/src/bsp/SystemTimer/SystemTimer.cpp +++ b/executables/referenceApp/platforms/s32k148evb/bspConfiguration/src/bsp/SystemTimer/SystemTimer.cpp @@ -52,9 +52,9 @@ void initSystemTimer() LPIT0->TMR[0].TVAL = 0xFFFFFFFFU; LPIT0->SETTEN = 0x1U; - DEMCR |= 0x01000000U; + DEMCR = DEMCR | 0x01000000U; DWT_CYCCNT = 0; - DWT_CTRL |= 0x00000001U; + DWT_CTRL = DWT_CTRL | 0x00000001U; state.ticks = 0; // General ticks counter, never overflows state.lastDwt = 0; diff --git a/executables/referenceApp/platforms/s32k148evb/bspConfiguration/src/bsp/adc/AnalogInput.cpp b/executables/referenceApp/platforms/s32k148evb/bspConfiguration/src/bsp/adc/AnalogInput.cpp index 7675de4a7c..62894ee42b 100644 --- a/executables/referenceApp/platforms/s32k148evb/bspConfiguration/src/bsp/adc/AnalogInput.cpp +++ b/executables/referenceApp/platforms/s32k148evb/bspConfiguration/src/bsp/adc/AnalogInput.cpp @@ -32,8 +32,8 @@ void AnalogInput::init() sizeof(analogInputScaleConfiguration) / sizeof(AnalogInputScale::scale)), &analogInputScaleConfiguration[0]); - SIM->ADCOPT = 0U; - SIM->CHIPCTL &= ~SIM_CHIPCTL_PDB_BB_SEL_MASK; + SIM->ADCOPT = 0U; + SIM->CHIPCTL = SIM->CHIPCTL & ~SIM_CHIPCTL_PDB_BB_SEL_MASK; (void)fAdc0.init(); diff --git a/platforms/s32k1xx/bsp/bspAdc/include/adc/Adc.h b/platforms/s32k1xx/bsp/bspAdc/include/adc/Adc.h index 96e766f45b..30377e5127 100644 --- a/platforms/s32k1xx/bsp/bspAdc/include/adc/Adc.h +++ b/platforms/s32k1xx/bsp/bspAdc/include/adc/Adc.h @@ -70,7 +70,7 @@ void Adc::enableChannel( fAdc.SC1[channel] = extInput + isrMask; if (0U == channel) { - uint32_t volatile timeout = 0; + uint32_t timeout = 0; do { timeout++; @@ -79,7 +79,7 @@ void Adc::enableChannel( break; } } while ((fAdc.SC1[0] & (COCO)) == 0); - ESR_UNUSED volatile uint32_t a = fAdcInResolution(fAdc.R[0]); + ESR_UNUSED uint32_t a = fAdcInResolution(fAdc.R[0]); } } } @@ -116,7 +116,7 @@ bsp::BspReturnCode Adc::init() fAdc.SC2 = 0; fAdc.SC3 = 0x87UL; - uint32_t volatile timeout = 0; + uint32_t timeout = 0; do { timeout++; @@ -248,7 +248,7 @@ bsp::BspReturnCode Adc::getValueSy ESR_UNUSED volatile uint32_t a = fAdc.R[0]; fAdc.SC1[0] = phChannel; - uint32_t volatile timeout = 0; + uint32_t timeout = 0; do { timeout++; @@ -277,11 +277,11 @@ bsp::BspReturnCode Adc::dma(bool a ESR_UNUSED volatile uint32_t a = fAdc.R[0]; if (true == active) { - fAdc.SC2 |= (1 << 3); + fAdc.SC2 = fAdc.SC2 | (1 << 3); } else { - fAdc.SC2 &= ~(1 << 3); + fAdc.SC2 = fAdc.SC2 & ~(1 << 3); } return bsp::BSP_OK; } diff --git a/platforms/s32k1xx/bsp/bspClock/src/clockConfig.cpp b/platforms/s32k1xx/bsp/bspClock/src/clockConfig.cpp index 8b47d1a1ea..4c26effb76 100644 --- a/platforms/s32k1xx/bsp/bspClock/src/clockConfig.cpp +++ b/platforms/s32k1xx/bsp/bspClock/src/clockConfig.cpp @@ -97,24 +97,24 @@ void enablePeripheralClocks(void) #endif #ifdef PCC_FTM3_INDEX PCC->PCCn[PCC_FTM3_INDEX] = CLOCK_SOURCE_FTM3; - PCC->PCCn[PCC_FTM3_INDEX] |= 0xC0000000U; + PCC->PCCn[PCC_FTM3_INDEX] = PCC->PCCn[PCC_FTM3_INDEX] | 0xC0000000U; #endif #ifdef PCC_ADC1_INDEX PCC->PCCn[PCC_ADC1_INDEX] = CLOCK_SOURCE_ADC1; - PCC->PCCn[PCC_ADC1_INDEX] |= 0xC0000000U; + PCC->PCCn[PCC_ADC1_INDEX] = PCC->PCCn[PCC_ADC1_INDEX] | 0xC0000000U; #endif #ifdef PCC_FlexCAN2_INDEX PCC->PCCn[PCC_FlexCAN2_INDEX] = 0xC0000000U; #endif PCC->PCCn[PCC_LPSPI0_INDEX] = CLOCK_SOURCE_LPSPI0; - PCC->PCCn[PCC_LPSPI0_INDEX] |= 0xC0000000U; + PCC->PCCn[PCC_LPSPI0_INDEX] = PCC->PCCn[PCC_LPSPI0_INDEX] | 0xC0000000U; #ifdef PCC_LPSPI1_INDEX PCC->PCCn[PCC_LPSPI1_INDEX] = CLOCK_SOURCE_LPSPI1; - PCC->PCCn[PCC_LPSPI1_INDEX] |= 0xC0000000U; + PCC->PCCn[PCC_LPSPI1_INDEX] = PCC->PCCn[PCC_LPSPI1_INDEX] | 0xC0000000U; #endif #ifdef PCC_LPSPI2_INDEX PCC->PCCn[PCC_LPSPI2_INDEX] = CLOCK_SOURCE_LPSPI2; - PCC->PCCn[PCC_LPSPI2_INDEX] |= 0xC0000000U; + PCC->PCCn[PCC_LPSPI2_INDEX] = PCC->PCCn[PCC_LPSPI2_INDEX] | 0xC0000000U; #endif #ifdef PCC_PDB1_INDEX PCC->PCCn[PCC_PDB1_INDEX] = 0xC0000000U; @@ -122,47 +122,47 @@ void enablePeripheralClocks(void) PCC->PCCn[PCC_CRC_INDEX] = 0xC0000000U; PCC->PCCn[PCC_PDB0_INDEX] = 0xC0000000U; PCC->PCCn[PCC_LPIT_INDEX] = CLOCK_SOURCE_LPIT; - PCC->PCCn[PCC_LPIT_INDEX] |= 0xC0000000U; + PCC->PCCn[PCC_LPIT_INDEX] = PCC->PCCn[PCC_LPIT_INDEX] | 0xC0000000U; PCC->PCCn[PCC_FTM0_INDEX] = CLOCK_SOURCE_FTM0; - PCC->PCCn[PCC_FTM0_INDEX] |= 0xC0000000U; + PCC->PCCn[PCC_FTM0_INDEX] = PCC->PCCn[PCC_FTM0_INDEX] | 0xC0000000U; PCC->PCCn[PCC_FTM1_INDEX] = CLOCK_SOURCE_FTM1; - PCC->PCCn[PCC_FTM1_INDEX] |= 0xC0000000U; + PCC->PCCn[PCC_FTM1_INDEX] = PCC->PCCn[PCC_FTM1_INDEX] | 0xC0000000U; #ifdef PCC_FTM2_INDEX PCC->PCCn[PCC_FTM2_INDEX] = CLOCK_SOURCE_FTM2; - PCC->PCCn[PCC_FTM2_INDEX] |= 0xC0000000U; + PCC->PCCn[PCC_FTM2_INDEX] = PCC->PCCn[PCC_FTM2_INDEX] | 0xC0000000U; #endif - PCC->PCCn[PCC_ADC0_INDEX] = CLOCK_SOURCE_ADC0; - PCC->PCCn[PCC_ADC0_INDEX] |= 0xC0000000U; + PCC->PCCn[PCC_ADC0_INDEX] = CLOCK_SOURCE_ADC0; + PCC->PCCn[PCC_ADC0_INDEX] = PCC->PCCn[PCC_ADC0_INDEX] | 0xC0000000U; PCC->PCCn[PCC_RTC_INDEX] = 0xC0000000U; PCC->PCCn[PCC_LPTMR0_INDEX] = CLOCK_SOURCE_LPTMR0; - PCC->PCCn[PCC_LPTMR0_INDEX] |= 0xC0000000U; + PCC->PCCn[PCC_LPTMR0_INDEX] = PCC->PCCn[PCC_LPTMR0_INDEX] | 0xC0000000U; PCC->PCCn[PCC_PORTA_INDEX] = 0xC0000000U; PCC->PCCn[PCC_PORTB_INDEX] = 0xC0000000U; PCC->PCCn[PCC_PORTC_INDEX] = 0xC0000000U; PCC->PCCn[PCC_PORTD_INDEX] = 0xC0000000U; PCC->PCCn[PCC_PORTE_INDEX] = 0xC0000000U; PCC->PCCn[PCC_FlexIO_INDEX] = CLOCK_SOURCE_FLEXIO; - PCC->PCCn[PCC_FlexIO_INDEX] |= 0xC0000000U; + PCC->PCCn[PCC_FlexIO_INDEX] = PCC->PCCn[PCC_FlexIO_INDEX] | 0xC0000000U; #ifdef PCC_EWM_INDEX PCC->PCCn[PCC_EWM_INDEX] = 0xC0000000U; #endif - PCC->PCCn[PCC_LPI2C0_INDEX] = CLOCK_SOURCE_LPI2C0; - PCC->PCCn[PCC_LPI2C0_INDEX] |= 0xC0000000U; + PCC->PCCn[PCC_LPI2C0_INDEX] = CLOCK_SOURCE_LPI2C0; + PCC->PCCn[PCC_LPI2C0_INDEX] = PCC->PCCn[PCC_LPI2C0_INDEX] | 0xC0000000U; PCC->PCCn[PCC_LPUART0_INDEX] = CLOCK_SOURCE_LPUART0; - PCC->PCCn[PCC_LPUART0_INDEX] |= 0xC0000000U; + PCC->PCCn[PCC_LPUART0_INDEX] = PCC->PCCn[PCC_LPUART0_INDEX] | 0xC0000000U; PCC->PCCn[PCC_LPUART1_INDEX] = CLOCK_SOURCE_LPUART1; - PCC->PCCn[PCC_LPUART1_INDEX] |= 0xC0000000U; + PCC->PCCn[PCC_LPUART1_INDEX] = PCC->PCCn[PCC_LPUART1_INDEX] | 0xC0000000U; #ifdef PCC_LPUART2_INDEX PCC->PCCn[PCC_LPUART2_INDEX] = CLOCK_SOURCE_LPUART2; - PCC->PCCn[PCC_LPUART2_INDEX] |= 0xC0000000U; + PCC->PCCn[PCC_LPUART2_INDEX] = PCC->PCCn[PCC_LPUART2_INDEX] | 0xC0000000U; #endif #ifdef PCC_FTM4_INDEX PCC->PCCn[PCC_FTM4_INDEX] = CLOCK_SOURCE_FTM4; - PCC->PCCn[PCC_FTM4_INDEX] |= 0xC0000000U; + PCC->PCCn[PCC_FTM4_INDEX] = PCC->PCCn[PCC_FTM4_INDEX] | 0xC0000000U; #endif #ifdef PCC_FTM5_INDEX PCC->PCCn[PCC_FTM5_INDEX] = CLOCK_SOURCE_FTM5; - PCC->PCCn[PCC_FTM5_INDEX] |= 0xC0000000U; + PCC->PCCn[PCC_FTM5_INDEX] = PCC->PCCn[PCC_FTM5_INDEX] | 0xC0000000U; #endif PCC->PCCn[PCC_CMP0_INDEX] = 0xC0000000U; #ifdef PCC_CMU0_INDEX @@ -177,7 +177,7 @@ void sircStart() { do { - SCG->SIRCCSR |= SCG_SIRCCSR_SIRCEN_MASK; + SCG->SIRCCSR = SCG->SIRCCSR | SCG_SIRCCSR_SIRCEN_MASK; } while (0 == (SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK)); } @@ -213,7 +213,7 @@ void fircStart() { do { - SCG->FIRCCSR |= SCG_FIRCCSR_FIRCEN_MASK | SCG_FIRCCSR_FIRCERR_MASK; + SCG->FIRCCSR = SCG->FIRCCSR | (SCG_FIRCCSR_FIRCEN_MASK | SCG_FIRCCSR_FIRCERR_MASK); } while (0 == (SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK)); } @@ -250,13 +250,13 @@ void spllStart() { do { - SCG->SPLLCSR |= SCG_SPLLCSR_SPLLEN_MASK | SCG_SPLLCSR_SPLLERR_MASK; + SCG->SPLLCSR = SCG->SPLLCSR | (SCG_SPLLCSR_SPLLEN_MASK | SCG_SPLLCSR_SPLLERR_MASK); } while (0 == (SCG->SPLLCSR & SCG_SPLLCSR_SPLLVLD_MASK)); } void spllStop() { - SCG->SPLLCSR &= ~(SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK); + SCG->SPLLCSR = SCG->SPLLCSR & ~(SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK); do { SCG->SPLLCSR = SCG_SPLLCSR_SPLLERR_MASK; @@ -279,7 +279,10 @@ void spllSysClk() SysTick->LOAD = 80000 - 1; } -void spllMon() { SCG->SPLLCSR |= SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK; } +void spllMon() +{ + SCG->SPLLCSR = SCG->SPLLCSR | (SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK); +} bool isSpllSysClk() { return (SCG->SPLLCSR & SCG_SPLLCSR_SPLLSEL_MASK) != 0; } @@ -290,13 +293,13 @@ void soscStart() { do { - SCG->SOSCCSR |= SCG_SOSCCSR_SOSCEN_MASK | SCG_SOSCCSR_SOSCERR_MASK; + SCG->SOSCCSR = SCG->SOSCCSR | (SCG_SOSCCSR_SOSCEN_MASK | SCG_SOSCCSR_SOSCERR_MASK); } while (0 == (SCG->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK)); } void soscStop() { - SCG->SOSCCSR &= ~(SCG_SOSCCSR_SOSCCM_MASK | SCG_SOSCCSR_SOSCCMRE_MASK); + SCG->SOSCCSR = SCG->SOSCCSR & ~(SCG_SOSCCSR_SOSCCM_MASK | SCG_SOSCCSR_SOSCCMRE_MASK); do { SCG->SOSCCSR = SCG_SOSCCSR_SOSCERR_MASK; @@ -309,7 +312,10 @@ void soscConfig() SCG->SOSCDIV = SCG_SOSCDIV_SOSCDIV2(_SOSCDIV2) | SCG_SOSCDIV_SOSCDIV1(_SOSCDIV1); } -void soscMon() { SCG->SOSCCSR |= SCG_SOSCCSR_SOSCCM_MASK | SCG_SOSCCSR_SOSCCMRE_MASK; } +void soscMon() +{ + SCG->SOSCCSR = SCG->SOSCCSR | (SCG_SOSCCSR_SOSCCM_MASK | SCG_SOSCCSR_SOSCCMRE_MASK); +} bool isSoscSysClk() { return (SCG->SOSCCSR & SCG_SOSCCSR_SOSCSEL_MASK) != 0; } @@ -332,7 +338,7 @@ void configurPll() disablePeripheralClocks(); // legacy - RCM->SRIE |= static_cast(0x8f); + RCM->SRIE = RCM->SRIE | static_cast(0x8f); RCM->SSRS = static_cast(0x1c); bool sircNeedsConfig = true; diff --git a/platforms/s32k1xx/bsp/bspFlexCan/include/can/FlexCANDevice.h b/platforms/s32k1xx/bsp/bspFlexCan/include/can/FlexCANDevice.h index f715ca75b7..ebc8930080 100644 --- a/platforms/s32k1xx/bsp/bspFlexCan/include/can/FlexCANDevice.h +++ b/platforms/s32k1xx/bsp/bspFlexCan/include/can/FlexCANDevice.h @@ -133,12 +133,12 @@ class FlexCANDevice void enableTransmitInterrupt() { fpDevice->IFLAG1 = fTxInterruptMask0; - fpDevice->IMASK1 |= fTxInterruptMask0; + fpDevice->IMASK1 = fpDevice->IMASK1 | fTxInterruptMask0; } void disableTransmitInterrupt() { - fpDevice->IMASK1 &= ~fTxInterruptMask0; + fpDevice->IMASK1 = fpDevice->IMASK1 & ~fTxInterruptMask0; fpDevice->IFLAG1 = fTxInterruptMask0; } diff --git a/platforms/s32k1xx/bsp/bspFlexCan/src/can/FlexCANDevice.cpp b/platforms/s32k1xx/bsp/bspFlexCan/src/can/FlexCANDevice.cpp index 05f88af0ac..14c0883ed1 100644 --- a/platforms/s32k1xx/bsp/bspFlexCan/src/can/FlexCANDevice.cpp +++ b/platforms/s32k1xx/bsp/bspFlexCan/src/can/FlexCANDevice.cpp @@ -101,10 +101,10 @@ ICanTransceiver::ErrorCode FlexCANDevice::init() fPhy.init(fConfig.BusId); // Enable module - fpDevice->MCR &= ~FLEXCAN_MCR_MDIS_MASK; + fpDevice->MCR = fpDevice->MCR & ~FLEXCAN_MCR_MDIS_MASK; // Soft reset - fpDevice->MCR |= FLEXCAN_MCR_SOFTRST_MASK; + fpDevice->MCR = fpDevice->MCR | FLEXCAN_MCR_SOFTRST_MASK; if (::bsp::isEqualAfterTimeout( &fpDevice->MCR, FLEXCAN_MCR_SOFTRST_MASK, @@ -115,7 +115,7 @@ ICanTransceiver::ErrorCode FlexCANDevice::init() } // Enter freeze mode - fpDevice->MCR |= (FLEXCAN_MCR_FRZ_MASK | FLEXCAN_MCR_HALT_MASK); + fpDevice->MCR = fpDevice->MCR | (FLEXCAN_MCR_FRZ_MASK | FLEXCAN_MCR_HALT_MASK); if (::bsp::isEqualAfterTimeout( &fpDevice->MCR, FLEXCAN_MCR_FRZACK_MASK, 0UL, INIT_DELAY_TIMEOUT_US)) { @@ -125,14 +125,14 @@ ICanTransceiver::ErrorCode FlexCANDevice::init() // Setup MCR: // Disable self reception // IRQM have to be switched on - fpDevice->MCR - |= (FLEXCAN_MCR_MAXMB(e_TRANSMIT_BUFFER_MAX) | FLEXCAN_MCR_SRXDIS_MASK - | FLEXCAN_MCR_IRMQ_MASK); + fpDevice->MCR = fpDevice->MCR + | (FLEXCAN_MCR_MAXMB(e_TRANSMIT_BUFFER_MAX) | FLEXCAN_MCR_SRXDIS_MASK + | FLEXCAN_MCR_IRMQ_MASK); // Setup CTRL fpDevice->CTRL1 = 0; - fpDevice->CTRL1 |= fConfig.clockSetupRegister; - fpDevice->CTRL2 |= FLEXCAN_CTRL2_MRP_MASK; + fpDevice->CTRL1 = fpDevice->CTRL1 | fConfig.clockSetupRegister; + fpDevice->CTRL2 = fpDevice->CTRL2 | FLEXCAN_CTRL2_MRP_MASK; // Setup message buffers fRxInterruptMask = 0; @@ -182,7 +182,7 @@ ICanTransceiver::ErrorCode FlexCANDevice::start() fpDevice->IMASK1 = fRxInterruptMask; // Leave freeze mode - fpDevice->MCR &= (~FLEXCAN_MCR_HALT_MASK & ~FLEXCAN_MCR_FRZ_MASK); + fpDevice->MCR = fpDevice->MCR & (~FLEXCAN_MCR_HALT_MASK & ~FLEXCAN_MCR_FRZ_MASK); if (::bsp::isEqualAfterTimeout( &fpDevice->MCR, (FLEXCAN_MCR_NOTRDY_MASK), diff --git a/platforms/s32k1xx/bsp/bspFtm/include/ftm/Ftm.h b/platforms/s32k1xx/bsp/bspFtm/include/ftm/Ftm.h index fbb1f84821..ee3bd85d8d 100644 --- a/platforms/s32k1xx/bsp/bspFtm/include/ftm/Ftm.h +++ b/platforms/s32k1xx/bsp/bspFtm/include/ftm/Ftm.h @@ -89,8 +89,8 @@ class Ftm { (void)setup; - _cfg = cfg; - _ftm.MODE |= FTM_MODE_WPDIS_MASK; + _cfg = cfg; + _ftm.MODE = _ftm.MODE | FTM_MODE_WPDIS_MASK; _ftm.CNTIN = _cfg->cntin; _ftm.MOD = _cfg->mod; _ftm.MODE = _cfg->mode | FTM_MODE_WPDIS_MASK; @@ -119,13 +119,13 @@ class Ftm inline void stop() { - _ftm.MODE |= FTM_MODE_WPDIS_MASK; - _ftm.SC = 0; + _ftm.MODE = _ftm.MODE | FTM_MODE_WPDIS_MASK; + _ftm.SC = 0; } inline void start() { - _ftm.MODE |= FTM_MODE_WPDIS_MASK; + _ftm.MODE = _ftm.MODE | FTM_MODE_WPDIS_MASK; clrOverflowEvent(); clrReloadEvent(); _ftm.SC = _cfg->sc; @@ -148,7 +148,7 @@ class Ftm inline uint32_t getFaultStatus() { return _ftm.FMS; } - inline void trgSwTrigger() { _ftm.SYNC |= FTM_SYNC_SWSYNC_MASK; } + inline void trgSwTrigger() { _ftm.SYNC = _ftm.SYNC | FTM_SYNC_SWSYNC_MASK; } #pragma GCC diagnostic push #pragma GCC diagnostic ignored "-Wstrict-aliasing" @@ -168,11 +168,11 @@ class Ftm { if (v) { - _ftm.MODE |= FTM_MODE_WPDIS_MASK; + _ftm.MODE = _ftm.MODE | FTM_MODE_WPDIS_MASK; } else { - _ftm.MODE &= ~FTM_MODE_WPDIS_MASK; + _ftm.MODE = _ftm.MODE & ~FTM_MODE_WPDIS_MASK; } } @@ -234,11 +234,11 @@ class Ftm { if (v) { - _ftm.SC |= static_cast(1U) << 5U; + _ftm.SC = _ftm.SC | (static_cast(1U) << 5U); } else { - _ftm.SC &= ~(static_cast(1U) << 5U); + _ftm.SC = _ftm.SC & ~(static_cast(1U) << 5U); } } @@ -248,22 +248,22 @@ class Ftm { if (v) { - _ftm.SC |= static_cast(1U) << (16U + channel); + _ftm.SC = _ftm.SC | (static_cast(1U) << (16U + channel)); } else { - _ftm.SC &= ~(static_cast(1U) << (16U + channel)); + _ftm.SC = _ftm.SC & ~(static_cast(1U) << (16U + channel)); } } } inline bool getOverflowEvent() { return (_ftm.SC & FTM_SC_TOF_MASK) != 0; } - inline void clrOverflowEvent() { _ftm.SC &= ~FTM_SC_TOF_MASK; } + inline void clrOverflowEvent() { _ftm.SC = _ftm.SC & ~FTM_SC_TOF_MASK; } inline bool getReloadEvent() { return (_ftm.SC & FTM_SC_RF_MASK) != 0; } - inline void clrReloadEvent() { _ftm.SC &= ~FTM_SC_RF_MASK; } + inline void clrReloadEvent() { _ftm.SC = _ftm.SC & ~FTM_SC_RF_MASK; } inline uint16_t getMOD() { return static_cast(_ftm.MOD); } @@ -273,13 +273,13 @@ class Ftm inline uint16_t forceReload() { - _ftm.PWMLOAD |= FTM_PWMLOAD_LDOK_MASK; + _ftm.PWMLOAD = _ftm.PWMLOAD | FTM_PWMLOAD_LDOK_MASK; return static_cast(_ftm.PWMLOAD); } inline uint16_t forceGlobalReload() { - _ftm.PWMLOAD |= FTM_PWMLOAD_GLDOK_MASK; + _ftm.PWMLOAD = _ftm.PWMLOAD | FTM_PWMLOAD_GLDOK_MASK; return static_cast(_ftm.PWMLOAD); } diff --git a/platforms/s32k1xx/bsp/bspFtmPwm/include/ftmPwm/FtmCombinePwm.h b/platforms/s32k1xx/bsp/bspFtmPwm/include/ftmPwm/FtmCombinePwm.h index 5f04802965..6c3fb36392 100644 --- a/platforms/s32k1xx/bsp/bspFtmPwm/include/ftmPwm/FtmCombinePwm.h +++ b/platforms/s32k1xx/bsp/bspFtmPwm/include/ftmPwm/FtmCombinePwm.h @@ -47,10 +47,10 @@ class FtmCombinePwm _HwChannel0.sc = 0; _HwChannel1.sc = 0; - _HwChannel0.sc |= (_configuration->ctrl0 & tFtm::CTRL_ELSx_MASK) << 2; - _HwChannel0.sc |= (_configuration->ctrl0 & tFtm::CTRL_MSx_MASK) << 2; - _HwChannel1.sc |= (_configuration->ctrl1 & tFtm::CTRL_ELSx_MASK) << 2; - _HwChannel1.sc |= (_configuration->ctrl1 & tFtm::CTRL_MSx_MASK) << 2; + _HwChannel0.sc = _HwChannel0.sc | ((_configuration->ctrl0 & tFtm::CTRL_ELSx_MASK) << 2); + _HwChannel0.sc = _HwChannel0.sc | ((_configuration->ctrl0 & tFtm::CTRL_MSx_MASK) << 2); + _HwChannel1.sc = _HwChannel1.sc | ((_configuration->ctrl1 & tFtm::CTRL_ELSx_MASK) << 2); + _HwChannel1.sc = _HwChannel1.sc | ((_configuration->ctrl1 & tFtm::CTRL_MSx_MASK) << 2); clrEvent(); // combine link settings @@ -90,35 +90,35 @@ class FtmCombinePwm _ftm.setPWMen((hwChannel / 2) * 2 + 1, true); if (_configuration->interruptActive0) { - _HwChannel0.sc |= FTM_CnSC_CHIE_MASK; + _HwChannel0.sc = _HwChannel0.sc | FTM_CnSC_CHIE_MASK; } else { - _HwChannel0.sc &= ~FTM_CnSC_CHIE_MASK; + _HwChannel0.sc = _HwChannel0.sc & ~FTM_CnSC_CHIE_MASK; } if (_configuration->interruptActive1) { - _HwChannel1.sc |= FTM_CnSC_CHIE_MASK; + _HwChannel1.sc = _HwChannel1.sc | FTM_CnSC_CHIE_MASK; } else { - _HwChannel1.sc &= ~FTM_CnSC_CHIE_MASK; + _HwChannel1.sc = _HwChannel1.sc & ~FTM_CnSC_CHIE_MASK; } if (_configuration->dmaActive0) { - _HwChannel0.sc |= FTM_CnSC_DMA_MASK; + _HwChannel0.sc = _HwChannel0.sc | FTM_CnSC_DMA_MASK; } else { - _HwChannel0.sc &= ~FTM_CnSC_DMA_MASK; + _HwChannel0.sc = _HwChannel0.sc & ~FTM_CnSC_DMA_MASK; } if (_configuration->dmaActive1) { - _HwChannel1.sc |= FTM_CnSC_DMA_MASK; + _HwChannel1.sc = _HwChannel1.sc | FTM_CnSC_DMA_MASK; } else { - _HwChannel1.sc &= ~FTM_CnSC_DMA_MASK; + _HwChannel1.sc = _HwChannel1.sc & ~FTM_CnSC_DMA_MASK; } setDuty(0); return bsp::BSP_OK; @@ -133,10 +133,10 @@ class FtmCombinePwm _ftm.setPWMen((hwChannel / 2) * 2, false); _ftm.setPWMen((hwChannel / 2) * 2 + 1, false); setDuty(0); - _HwChannel0.sc &= ~FTM_CnSC_CHIE_MASK; - _HwChannel0.sc &= ~FTM_CnSC_DMA_MASK; - _HwChannel1.sc &= ~FTM_CnSC_CHIE_MASK; - _HwChannel1.sc &= ~FTM_CnSC_DMA_MASK; + _HwChannel0.sc = _HwChannel0.sc & ~FTM_CnSC_CHIE_MASK; + _HwChannel0.sc = _HwChannel0.sc & ~FTM_CnSC_DMA_MASK; + _HwChannel1.sc = _HwChannel1.sc & ~FTM_CnSC_CHIE_MASK; + _HwChannel1.sc = _HwChannel1.sc & ~FTM_CnSC_DMA_MASK; clrEvent(); return bsp::BSP_OK; @@ -264,8 +264,8 @@ class FtmCombinePwm inline void clrEvent() { - _HwChannel0.sc &= ~FTM_CnSC_CHF_MASK; - _HwChannel1.sc &= ~FTM_CnSC_CHF_MASK; + _HwChannel0.sc = _HwChannel0.sc & ~FTM_CnSC_CHF_MASK; + _HwChannel1.sc = _HwChannel1.sc & ~FTM_CnSC_CHF_MASK; } inline bool getEvent0() { return (_HwChannel0.sc & FTM_CnSC_CHF_MASK) != 0; } diff --git a/platforms/s32k1xx/bsp/bspFtmPwm/include/ftmPwm/FtmEPwm.h b/platforms/s32k1xx/bsp/bspFtmPwm/include/ftmPwm/FtmEPwm.h index 486457edcc..d9b499523e 100644 --- a/platforms/s32k1xx/bsp/bspFtmPwm/include/ftmPwm/FtmEPwm.h +++ b/platforms/s32k1xx/bsp/bspFtmPwm/include/ftmPwm/FtmEPwm.h @@ -41,8 +41,8 @@ class FtmEPwm _ftm.writeProtectionDisable(true); _HwChannel.sc = 0; - _HwChannel.sc |= (_configuration->ctrl & tFtm::CTRL_ELSx_MASK) << 2; - _HwChannel.sc |= (_configuration->ctrl & tFtm::CTRL_MSx_MASK) << 2; + _HwChannel.sc = _HwChannel.sc | ((_configuration->ctrl & tFtm::CTRL_ELSx_MASK) << 2); + _HwChannel.sc = _HwChannel.sc | ((_configuration->ctrl & tFtm::CTRL_MSx_MASK) << 2); clrEvent(); @@ -70,19 +70,19 @@ class FtmEPwm _ftm.setPWMen(hwChannel, true); if (_configuration->interruptActive) { - _HwChannel.sc |= FTM_CnSC_CHIE_MASK; + _HwChannel.sc = _HwChannel.sc | FTM_CnSC_CHIE_MASK; } else { - _HwChannel.sc &= ~FTM_CnSC_CHIE_MASK; + _HwChannel.sc = _HwChannel.sc & ~FTM_CnSC_CHIE_MASK; } if (_configuration->dmaActive) { - _HwChannel.sc |= FTM_CnSC_DMA_MASK; + _HwChannel.sc = _HwChannel.sc | FTM_CnSC_DMA_MASK; } else { - _HwChannel.sc &= ~FTM_CnSC_DMA_MASK; + _HwChannel.sc = _HwChannel.sc & ~FTM_CnSC_DMA_MASK; } setDuty(0); return bsp::BSP_OK; @@ -96,8 +96,8 @@ class FtmEPwm _ftm.setPWMen(hwChannel, false); setDuty(0); _ftm.writeProtectionDisable(true); - _HwChannel.sc &= ~FTM_CnSC_CHIE_MASK; - _HwChannel.sc &= ~FTM_CnSC_DMA_MASK; + _HwChannel.sc = _HwChannel.sc & ~FTM_CnSC_CHIE_MASK; + _HwChannel.sc = _HwChannel.sc & ~FTM_CnSC_DMA_MASK; clrEvent(); return bsp::BSP_OK; @@ -179,7 +179,7 @@ class FtmEPwm inline uint8_t getChannel() { return hwChannel; } - inline void clrEvent() { _HwChannel.sc &= ~FTM_CnSC_CHF_MASK; } + inline void clrEvent() { _HwChannel.sc = _HwChannel.sc & ~FTM_CnSC_CHF_MASK; } inline bool getEvent() { return (_HwChannel.sc & FTM_CnSC_CHF_MASK) != 0; } diff --git a/platforms/s32k1xx/bsp/bspFtmPwm/include/ftmPwm/FtmModCombinePwm.h b/platforms/s32k1xx/bsp/bspFtmPwm/include/ftmPwm/FtmModCombinePwm.h index 6d7d7cc8cd..f5d0541b72 100644 --- a/platforms/s32k1xx/bsp/bspFtmPwm/include/ftmPwm/FtmModCombinePwm.h +++ b/platforms/s32k1xx/bsp/bspFtmPwm/include/ftmPwm/FtmModCombinePwm.h @@ -48,10 +48,10 @@ class FtmModCombinePwm _HwChannel0.sc = 0; _HwChannel1.sc = 0; - _HwChannel0.sc |= (_configuration->ctrl0 & tFtm::CTRL_ELSx_MASK) << 2; - _HwChannel0.sc |= (_configuration->ctrl0 & tFtm::CTRL_MSx_MASK) << 2; - _HwChannel1.sc |= (_configuration->ctrl1 & tFtm::CTRL_ELSx_MASK) << 2; - _HwChannel1.sc |= (_configuration->ctrl1 & tFtm::CTRL_MSx_MASK) << 2; + _HwChannel0.sc = _HwChannel0.sc | ((_configuration->ctrl0 & tFtm::CTRL_ELSx_MASK) << 2); + _HwChannel0.sc = _HwChannel0.sc | ((_configuration->ctrl0 & tFtm::CTRL_MSx_MASK) << 2); + _HwChannel1.sc = _HwChannel1.sc | ((_configuration->ctrl1 & tFtm::CTRL_ELSx_MASK) << 2); + _HwChannel1.sc = _HwChannel1.sc | ((_configuration->ctrl1 & tFtm::CTRL_MSx_MASK) << 2); clrEvent(); // combine link settings @@ -93,35 +93,35 @@ class FtmModCombinePwm _ftm.setPWMen((hwChannel / 2) * 2 + 1, true); if (_configuration->interruptActive0) { - _HwChannel0.sc |= FTM_CnSC_CHIE_MASK; + _HwChannel0.sc = _HwChannel0.sc | FTM_CnSC_CHIE_MASK; } else { - _HwChannel0.sc &= ~FTM_CnSC_CHIE_MASK; + _HwChannel0.sc = _HwChannel0.sc & ~FTM_CnSC_CHIE_MASK; } if (_configuration->interruptActive1) { - _HwChannel1.sc |= FTM_CnSC_CHIE_MASK; + _HwChannel1.sc = _HwChannel1.sc | FTM_CnSC_CHIE_MASK; } else { - _HwChannel1.sc &= ~FTM_CnSC_CHIE_MASK; + _HwChannel1.sc = _HwChannel1.sc & ~FTM_CnSC_CHIE_MASK; } if (_configuration->dmaActive0) { - _HwChannel0.sc |= FTM_CnSC_DMA_MASK; + _HwChannel0.sc = _HwChannel0.sc | FTM_CnSC_DMA_MASK; } else { - _HwChannel0.sc &= ~FTM_CnSC_DMA_MASK; + _HwChannel0.sc = _HwChannel0.sc & ~FTM_CnSC_DMA_MASK; } if (_configuration->dmaActive1) { - _HwChannel1.sc |= FTM_CnSC_DMA_MASK; + _HwChannel1.sc = _HwChannel1.sc | FTM_CnSC_DMA_MASK; } else { - _HwChannel1.sc &= ~FTM_CnSC_DMA_MASK; + _HwChannel1.sc = _HwChannel1.sc & ~FTM_CnSC_DMA_MASK; } setDuty(0); return bsp::BSP_OK; @@ -136,10 +136,10 @@ class FtmModCombinePwm _ftm.setPWMen((hwChannel / 2) * 2, false); _ftm.setPWMen((hwChannel / 2) * 2 + 1, false); setDuty(0); - _HwChannel0.sc &= ~FTM_CnSC_CHIE_MASK; - _HwChannel0.sc &= ~FTM_CnSC_DMA_MASK; - _HwChannel1.sc &= ~FTM_CnSC_CHIE_MASK; - _HwChannel1.sc &= ~FTM_CnSC_DMA_MASK; + _HwChannel0.sc = _HwChannel0.sc & ~FTM_CnSC_CHIE_MASK; + _HwChannel0.sc = _HwChannel0.sc & ~FTM_CnSC_DMA_MASK; + _HwChannel1.sc = _HwChannel1.sc & ~FTM_CnSC_CHIE_MASK; + _HwChannel1.sc = _HwChannel1.sc & ~FTM_CnSC_DMA_MASK; clrEvent(); return bsp::BSP_OK; } @@ -261,8 +261,8 @@ class FtmModCombinePwm inline void clrEvent() { - _HwChannel0.sc &= ~FTM_CnSC_CHF_MASK; - _HwChannel1.sc &= ~FTM_CnSC_CHF_MASK; + _HwChannel0.sc = _HwChannel0.sc & ~FTM_CnSC_CHF_MASK; + _HwChannel1.sc = _HwChannel1.sc & ~FTM_CnSC_CHF_MASK; } inline bool getEvent0() { return (_HwChannel0.sc & FTM_CnSC_CHF_MASK) != 0; } diff --git a/platforms/s32k1xx/bsp/bspInterruptsImpl/include/interrupts/disableEnableAllInterrupts.h b/platforms/s32k1xx/bsp/bspInterruptsImpl/include/interrupts/disableEnableAllInterrupts.h index eae0c2b702..9296fe98f5 100644 --- a/platforms/s32k1xx/bsp/bspInterruptsImpl/include/interrupts/disableEnableAllInterrupts.h +++ b/platforms/s32k1xx/bsp/bspInterruptsImpl/include/interrupts/disableEnableAllInterrupts.h @@ -5,7 +5,7 @@ // clang-format off static inline __attribute__((always_inline)) -volatile void disableAllInterrupts(void) +void disableAllInterrupts(void) { asm( "cpsid i;" @@ -15,7 +15,7 @@ asm( ); } static inline __attribute__((always_inline)) - volatile void enableAllInterrupts(void) +void enableAllInterrupts(void) { asm ( "ISB;" diff --git a/platforms/s32k1xx/bsp/bspInterruptsImpl/include/interrupts/suspendResumeAllInterrupts.h b/platforms/s32k1xx/bsp/bspInterruptsImpl/include/interrupts/suspendResumeAllInterrupts.h index 6318ccea88..d05e923f3a 100644 --- a/platforms/s32k1xx/bsp/bspInterruptsImpl/include/interrupts/suspendResumeAllInterrupts.h +++ b/platforms/s32k1xx/bsp/bspInterruptsImpl/include/interrupts/suspendResumeAllInterrupts.h @@ -13,7 +13,7 @@ typedef int32_t OldIntEnabledStatusValueType; // clang-format off static inline __attribute__((always_inline)) -volatile uint32_t getMachineStateRegisterValueAndSuspendAllInterrupts(void) +uint32_t getMachineStateRegisterValueAndSuspendAllInterrupts(void) { uint32_t _PRIMASK; __asm(" mrs %0, PRIMASK\n" @@ -22,7 +22,7 @@ volatile uint32_t getMachineStateRegisterValueAndSuspendAllInterrupts(void) return(_PRIMASK); } static inline __attribute__((always_inline)) -volatile void resumeAllInterrupts(uint32_t oldMachineStateRegisterValue) +void resumeAllInterrupts(uint32_t oldMachineStateRegisterValue) { __asm(" msr PRIMASK,%[Input]\n" ::[Input] "r" (oldMachineStateRegisterValue) diff --git a/platforms/s32k1xx/bsp/bspIo/src/io/Io.cpp b/platforms/s32k1xx/bsp/bspIo/src/io/Io.cpp index 3f32185f79..cb5fffda67 100644 --- a/platforms/s32k1xx/bsp/bspIo/src/io/Io.cpp +++ b/platforms/s32k1xx/bsp/bspIo/src/io/Io.cpp @@ -43,11 +43,11 @@ BspReturnCode Io::setConfiguration(uint16_t io, PinConfiguration const& cfg) GPIO_Type* portBase = (GPIO_Type*)(gpioPtrs[cfg.port]); PORT_Type* cfgBase = (PORT_Type*)(gpioPrfCfgPtrs[cfg.port]); // disable - portBase->PIDR |= (1 << cfg.pinNumber); // default High-Z + portBase->PIDR = portBase->PIDR | (1 << cfg.pinNumber); // default High-Z if (_IN == cfg.dir) { // filter settings .. - cfgBase->DFER &= ~(1 << cfg.pinNumber); + cfgBase->DFER = cfgBase->DFER & ~(1 << cfg.pinNumber); if (cfg.pinCfgExt & FILTER_ACTIVE) { if (cfg.pinCfgExt & FILTER_CLOCK_LPO) @@ -59,15 +59,15 @@ BspReturnCode Io::setConfiguration(uint16_t io, PinConfiguration const& cfg) cfgBase->DFCR = 0; } cfgBase->DFWR = (cfg.pinCfgExt & 0x1f); - cfgBase->DFER |= (1 << cfg.pinNumber); + cfgBase->DFER = cfgBase->DFER | (1 << cfg.pinNumber); } - portBase->PDDR &= ~(1 << cfg.pinNumber); - portBase->PIDR &= ~(1 << cfg.pinNumber); + portBase->PDDR = portBase->PDDR & ~(1 << cfg.pinNumber); + portBase->PIDR = portBase->PIDR & ~(1 << cfg.pinNumber); } else if (_OUT == cfg.dir) { - portBase->PDDR |= (1 << cfg.pinNumber); - portBase->PIDR &= ~(1 << cfg.pinNumber); + portBase->PDDR = portBase->PDDR | (1 << cfg.pinNumber); + portBase->PIDR = portBase->PIDR & ~(1 << cfg.pinNumber); } else { @@ -76,7 +76,7 @@ BspReturnCode Io::setConfiguration(uint16_t io, PinConfiguration const& cfg) cfgBase->PCR[cfg.pinNumber] = cfg.pinCfg; if (cfg.pinCfg & clearISR) { - cfgBase->PCR[cfg.pinNumber] |= clearISR; + cfgBase->PCR[cfg.pinNumber] = cfgBase->PCR[cfg.pinNumber] | clearISR; } } return BSP_OK; @@ -182,9 +182,9 @@ bsp::BspReturnCode Io::resetConfig(uint16_t io) GPIO_Type* portBase = (GPIO_Type*)(gpioPtrs[fPinConfiguration[io].port]); PORT_Type* cfgBase = (PORT_Type*)(gpioPrfCfgPtrs[fPinConfiguration[io].port]); // disable - portBase->PIDR |= (1 << fPinConfiguration[io].pinNumber); // default High-Z - portBase->PDDR &= ~(1 << fPinConfiguration[io].pinNumber); - cfgBase->DFER &= ~(1 << fPinConfiguration[io].pinNumber); + portBase->PIDR = portBase->PIDR | (1 << fPinConfiguration[io].pinNumber); // default High-Z + portBase->PDDR = portBase->PDDR & ~(1 << fPinConfiguration[io].pinNumber); + cfgBase->DFER = cfgBase->DFER & ~(1 << fPinConfiguration[io].pinNumber); cfgBase->PCR[fPinConfiguration[io].pinNumber] = 0; return BSP_OK; } diff --git a/platforms/s32k1xx/bsp/bspSci/src/SciDevice.cpp b/platforms/s32k1xx/bsp/bspSci/src/SciDevice.cpp index 8df2ddd5a1..b76e6e4b27 100644 --- a/platforms/s32k1xx/bsp/bspSci/src/SciDevice.cpp +++ b/platforms/s32k1xx/bsp/bspSci/src/SciDevice.cpp @@ -34,7 +34,7 @@ uint8_t sciGetRxReady() { if ((sciConfiguration.sci->STAT & LPUART_STAT_OR_MASK) != 0) { - sciConfiguration.sci->STAT |= LPUART_STAT_OR_MASK; + sciConfiguration.sci->STAT = sciConfiguration.sci->STAT | LPUART_STAT_OR_MASK; } if ((sciConfiguration.sci->STAT & LPUART_STAT_RDRF_MASK) != 0) {