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PCB Issues #8

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89Mods opened this issue Aug 19, 2024 · 0 comments
Open

PCB Issues #8

89Mods opened this issue Aug 19, 2024 · 0 comments

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@89Mods
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89Mods commented Aug 19, 2024

While trying to use this flow, I have noted several problems with the resulting PCB:

  • Excessive text in silkscreen that cannot be disabled
  • Clearance violations unless the DRC is lowered to boardhouse minimums (which is not recommended)
  • Routing intersecting vias (see image)
  • No option to generate 4-layer PCB (might yield better component density)
  • Vias intersecting pads (especially those appearing right in the center of a pad worry me about issues when soldering)

image
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