From 2a4fd5e766c4c9f13a2a164f11138f66eb9bdc79 Mon Sep 17 00:00:00 2001
From: Dolu1990 <charles.papon.90@gmail.com>
Date: Mon, 15 Jan 2024 16:21:50 +0100
Subject: [PATCH] fix #75 fix missing pull

---
 src/main/scala/naxriscv/platform/litex/NaxSoc.scala        | 2 +-
 src/main/scala/naxriscv/platform/tilelinkdemo/SocSim.scala | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/main/scala/naxriscv/platform/litex/NaxSoc.scala b/src/main/scala/naxriscv/platform/litex/NaxSoc.scala
index 0f0f07c8..96957bd2 100644
--- a/src/main/scala/naxriscv/platform/litex/NaxSoc.scala
+++ b/src/main/scala/naxriscv/platform/litex/NaxSoc.scala
@@ -189,7 +189,7 @@ class NaxSoc(c : NaxSocConfig) extends Component{
           case p: FetchCachePlugin => add(p.logic.refill.fire, i * 0x80 + 0x000)
           case p: DataCachePlugin => {
             add(p.logic.cache.refill.push.fire, i * 0x80 + 0x010)
-            add(p.logic.cache.writeback.push.fire && p.logic.cache.writeback.push.dirty, i * 0x80 + 0x014)
+            add(p.logic.cache.writeback.push.fire.pull() && p.logic.cache.writeback.push.dirty.pull(), i * 0x80 + 0x014)
             if (withL2) {
               val l2c = l2.cache.logic.cache
               l2c.rework {
diff --git a/src/main/scala/naxriscv/platform/tilelinkdemo/SocSim.scala b/src/main/scala/naxriscv/platform/tilelinkdemo/SocSim.scala
index 0daf6f74..3f3a901e 100644
--- a/src/main/scala/naxriscv/platform/tilelinkdemo/SocSim.scala
+++ b/src/main/scala/naxriscv/platform/tilelinkdemo/SocSim.scala
@@ -112,7 +112,7 @@ object SocSim extends App {
           case p: FetchCachePlugin => add(p.logic.refill.fire, i * 0x80 + 0x000)
           case p: DataCachePlugin => {
             add(p.logic.cache.refill.push.fire, i * 0x80 + 0x010)
-            add(p.logic.cache.writeback.push.fire && p.logic.cache.writeback.push.dirty, i * 0x80 + 0x014)
+            add(p.logic.cache.writeback.push.fire.pull() && p.logic.cache.writeback.push.dirty.pull(), i * 0x80 + 0x014)
             if (withL2) {
               val l2c = l2.cache.logic.cache
               l2c.rework{